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BabyWR is a general purpose small pluggable WR node in a M.2 form-factor. More info at the Wiki page

DI/OT Zynq Ultrascale-based System Board with White Rabbit support. More info at the Wiki page

A collection of platform-independent cores such as memories, synchronizer circuits and Wishbone cores.

More info at the Wiki page

Development of software for the White Rabbit switch, and in particular the embedded Linux system running in the ARM9 processor. More info at the Wiki page

White Rabbit PTP Core software for LatticeMico32. It consists of a software wrapper for running a PTP daemon without an operating system and device drivers for WRPC HDL internals.

This project contains all the HDL gateware necessary for the FPGA of the WR switch.

A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).

White Rabbit is a fully deterministic Ethernet-based network for general purpose data transfer and synchronization. It can synchronize over 1000 nodes with sub-ns accuracy over fiber lengths of up to 10 km. Commercially available. More info at the Wiki page

A fine delay generator in FMC LPC format with 1 input and 2 outputs. The resolution is 1 ns. Optimized for high frequency pulse repetition rates synchronized to an external clock. More info at the Wiki page

This project covers the hardware development of version 4 of the White Rabbit switch (WRS-v4). More info at the Wiki page

The Macbeth (MAChine / BEamline Timing Hardware) system is aimed to synchronize the beamlines experimental devices (pump-probe, laser, …) with the accelerator beam with a high accuracy

A Precise Time Protocol (PTP, IEEE 1588) software stack whose single source code can be compiled for many architectures (POSIX systems, WR switch, WR node, ...) and which is easily extensible.

Active 32/64 channels 19" patch panel for FPGA boards, with robust 5V TTL I/Os, configurable through I²C and USB-C. More info at the Wiki page

Distributed I/O Tier - these are electronics modules installed close to a particle accelerator in radiation-exposed or radiation-free areas controlled by the master in the Front-end tier over the fieldbus. These are usually FPGA-based boards sampling digital and analog inputs, driving outputs and performing various safety critical operations. More info at the Wiki page

Firmware(gateware) for FPGA on AIDA-Innova TLU ( AIDAInnova_TLU )

DIOT 3U crate mechanics and backplane compliant with CompactPCI-Serial standard.

A front-end PCI board with LEMO connectors to interface with the GPIO interconnect pins of the SIS1160 FMC carrier. More info at the Wiki page

DI/OT Peripheral Board Loop-back. More info at the Wiki page

Production and functional tests for PXIe controller COM Express based. More info at the Wiki page

The Electronics Design project gives helpful entry points for electronics engineers. VHDL coding, design reviews, components, production, assembly and testing are some subjects. More info at the Wiki page