White Rabbit Switch Fan-less hardware
Project description
White Rabbit Switch is the central element of a White Rabbit network and was designed as a part of the White Rabbit project. The current version of WRS 3.4 is built with two fans to provide force air cooling. *Measurement* shows that when the fans fail, temperature inside the WRS increases significantly, especially the FPGA chip.
WRS-Fan-less is a fan-less version of the WRS, specifically designed for long-term service-less operation and originated at the LHAASO project.
It is an open hardware design of an 18-ports Ethernet switch licensed under CERN OHL 1.2. As the design is open it can also be used as the hardware platform for other, non-White Rabbit projects.
WR Switch Fan-Less*
Highlight Features
- SMA connectors on front panel
- Power reboot button on front panel
- Dustproof cap for all front panel connectors
- Improved heat dissipation, without fan
- Optical SFP management port for long distance connection
- Integrated low jitter circuit (WRS-FL-LJ)
- Mounting options for various VCXOs
- Absolute calibration support
Main Features
- Front Panel
- 5 SMA connectors
- PPS-in / PPS-out / Clk-out (62.5MHz) / Clk-in (10MHz) / signal-out (software configurable)
- 18 cages for Gigabit SFP transceivers with EMI Shield (connected to Xilinx GTXs)
- Link and Act LEDs for each SFP cage through light guide pipe
- 10/100 RJ45 management port (connected to ARM CPU)
- 100 SFP optical management port (converted from the USB of the ARM CPU)
- USB port (connected to ARM CPU)
- USB-uart debugging port (connected to ARM CPU)
- Power and Status LEDs
- Power reboot button
- 5 SMA connectors
- Back Panel
- AC power jack
- Grounding connector
-
Clocking resources
- *Integrated Low-jitter WRS daughterboard*
- VM53S3-25.00 as default Internal Oscillator
- T604-025.0M, IVT32000C,DOT050V-020.0M, CVHD-950-100.000 can be mounted for evaluation.
- refer to SCB_clock_tree
- Xilinx Virtex-6 FPGA (XC6VLX240T as default, XC6VLX365T can be mounted upon request)
- ARM Atmel AT91 SAM9G45 CPU
- Memory:
- 64MB DDR2 / 256MB NAND / 8MB boot flash
- Others:
- 1x FPGA JTAG connector
- 1x ARM JTAG connector
- 2x QSS/QSH high speed connectors between SCB and backplane
- 4x u.FL Connectors for clock circuit test
- 2x u.FL Connectors for Absolute Calibration
- Power supply 100-240VAC, 2.0A, 50-60Hz input, 12V DC, 6.66A, 80W output
- Box dimensions 482.8 x 42.34 x 222 mm
- Certification (TBD)
- CE
- CCC (China Compulsory Certification)
WRS-FL consists of three elements:
- SCB_FL PCB - contains main electronics components, ARM processor, Xilinx FPGA chip, oscillators, memories, etc.
- backplane PCB - electrical connections to 18 SFP cages, debug USB-uart ports, LEDs, etc.
- WR Switch Box - is a 19'' 1U case. There are no cooling fans in the back - This box is specifically designed for passive cooling.
constructive heat dissipation plays an important role too.
Performance Test
Phase noise and jitter test with 10 cascaded
WRS-FL
temperature test results
Project information
- Firmware/Software
Standard Version (compatible with WRS-V3.4) |
Gateware Software |
Optical Management port support |
Gateware Software |
Low jitter circuit support |
Gateware Software LM32 |
Releases
Users List
LHAASO (Large High
Altitude Air Shower Observatory)
JUNO (Jiangmen Underground Neutrino
Observatory)
HiAF@IMP
CiADS@IMP
CASIC (China Aerospace Science and Industry Corporation)
NovelMedical (365T version)
GSI Helmholtzzentrum für Schwerionenforschung GmbH
Contacts
Commercial producers
-
SyncTechnology
- a spinoff company from THU
General question about project
- Guanghua Gong - Tsinghua University, Beijing
Status
Date | Event |
21-02-2018 | Start of project |
16-03-2018 | SCB_FL in repository, ready for review |
10-04-2018 | Backplane in repository, ready for review |
13-04-2018 | First batch of 10 SCB_FL assembled |
17-04-2018 | SCB_FL Review by 7S finished. Opinions will be included in next version |
20-04-2018 | Functional test passed with SCB_FL + Old mini-backplane (SFP0 removed) |
25-04-2018 | WRS-FL backplane assembled |
06-05-2018 | 5 WRS-FL prototypes tested. |
24-05-2018 | WRS-FL backplane redesigned for panel installation |
20-06-2018 | 5 WRS-FL with BKBv1.1 assembled |
25-06-2018 | WRS-FL demonstrated at 2nd WR tutorial workshop |
18-07-2018 | WRS-FL SCB redesigned |
20-08-2018 | First batch of 30 WRS-FL assembled |
04-09-2018 | Another 20 WRS-FL assembled |
05-09-2018 | SCBv1.2 low jitter function verified |
13-09-2018 | SCBv1.2 and BackplaneV1.2 publish and bug report |
14-09-2018 | SCB modified to V1.3 |
20-10-2018 | 50 WRS-FL under assembly for the LHAASO project |
12-11-2018 | 10 WRS-FL with low jitter support assembled and tested |
20-11-2018 | 40 WRS-FL under assembly for the LHAASO project |
08-12-2018 | Low jitter circuit support files released |
14 November 2018