add new commands for setting time

When WR PTP Core is set in GrandMaster mode it aligns its nanosecond
counter to 1-PPS and 10MHz coming from external source. When user wants
to set seconds counter to a desired value (with _time set_ command), the
nanosecond counter was also set (zeroed) causing additional (random)
offset to the external source. The commit adds _time setsec_ and _time
setnsec_ for setting only seconds or nanoseconds counter without
affecting the other one. Now, when user wants to set current time on a
GrandMaster Node he has to call _time setsec_ command after _mode gm_

dev/pps_gen.c

@@ -70,7 +70,7 @@ int shw_pps_gen_adjust(int counter, int64_t how_much)
 }
 
 /* Sets the current time */
-void shw_pps_gen_set_time(uint64_t seconds, uint32_t nanoseconds)
+void shw_pps_gen_set_time(uint64_t seconds, uint32_t nanoseconds, int counter)
 {
 	ppsg_write(ADJ_UTCLO, (uint32_t) (seconds & 0xffffffffLL));
 	ppsg_write(ADJ_UTCHI, (uint32_t) (seconds >> 32) & 0xff);
@@ -78,7 +78,12 @@ void shw_pps_gen_set_time(uint64_t seconds, uint32_t nanoseconds)
 		   (int32_t) ((int64_t) nanoseconds * 1000LL /
 			      (int64_t) REF_CLOCK_PERIOD_PS));
 
-	ppsg_write(CR, (ppsg_read(CR) & 0xfffffffb) | PPSG_CR_CNT_SET);
+	if (counter == PPSG_SET_ALL)
+		ppsg_write(CR, (ppsg_read(CR) & 0xfffffffb) | PPSG_CR_CNT_SET);
+	else if (counter == PPSG_SET_SEC)
+		ppsg_write(ESCR, (ppsg_read(ESCR) & 0xffffffe7) | PPSG_ESCR_SEC_SET);
+	else if (counter == PPSG_SET_NSEC)
+		ppsg_write(ESCR, (ppsg_read(ESCR) & 0xffffffe7) | PPSG_ESCR_NSEC_SET);
 }
 
 uint64_t pps_get_utc(void)

include/hw/pps_gen_regs.h

@@ -2,17 +2,19 @@
   Register definitions for slave core: WR Switch PPS generator and RTC
 
   * File           : pps_gen_regs.h
-  * Author         : auto-generated by wbgen2 from wrsw_pps_gen.wb
-  * Created        : Thu Oct 27 21:29:19 2011
+  * Author         : auto-generated by wbgen2 from pps_gen_wb.wb
+  * Created        : Fri Jul 26 15:09:09 2013
   * Standard       : ANSI C
 
-    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wrsw_pps_gen.wb
+    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE pps_gen_wb.wb
     DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
 
 */
 
-#ifndef __WBGEN2_REGDEFS_WRSW_PPS_GEN_WB
-#define __WBGEN2_REGDEFS_WRSW_PPS_GEN_WB
+#ifndef __WBGEN2_REGDEFS_PPS_GEN_WB_WB
+#define __WBGEN2_REGDEFS_PPS_GEN_WB_WB
+
+#include <inttypes.h>
 
 #if defined( __GNUC__)
 #define PACKED __attribute__ ((packed))
@@ -72,6 +74,12 @@
 /* definitions for field: Timecode output(UTC+cycles) valid in reg: External sync control register */
 #define PPSG_ESCR_TM_VALID                    WBGEN2_GEN_MASK(2, 1)
 
+/* definitions for field: Set seconds counter in reg: External sync control register */
+#define PPSG_ESCR_SEC_SET                     WBGEN2_GEN_MASK(3, 1)
+
+/* definitions for field: Set nanoseconds counter in reg: External sync control register */
+#define PPSG_ESCR_NSEC_SET                    WBGEN2_GEN_MASK(4, 1)
+
 PACKED struct PPSG_WB {
   /* [0x0]: REG Control Register */
   uint32_t CR;

include/pps_gen.h

@@ -5,6 +5,9 @@
 
 #define PPSG_ADJUST_SEC 0x1
 #define PPSG_ADJUST_NSEC 0x2
+#define PPSG_SET_SEC 0x1
+#define PPSG_SET_NSEC 0x2
+#define PPSG_SET_ALL 0x3
 
 /* Initializes the PPS Generator. 0 on success, negative on failure. */
 void shw_pps_gen_init(void);
@@ -22,6 +25,6 @@ int shw_pps_gen_enable_output(int enable);
 void shw_pps_gen_get_time(uint64_t * seconds, uint32_t * nanoseconds);
 
 /* Sets the time to <seconds,nanoseconds>. */
-void shw_pps_gen_set_time(uint64_t seconds, uint32_t nanoseconds);
+void shw_pps_gen_set_time(uint64_t seconds, uint32_t nanoseconds, int counter);
 
 #endif

shell/cmd_time.c

@@ -34,10 +34,20 @@ static int cmd_time(const char *args[])
 	if (args[2] && !strcasecmp(args[0], "set")) {
 		if (wrc_ptp_get_mode() != WRC_MODE_SLAVE) {
 			shw_pps_gen_set_time((uint64_t) atoi(args[1]),
-					 atoi(args[2]));
+					 atoi(args[2]), PPSG_SET_ALL);
 			return 0;
 		} else
 			return -EBUSY;
+	} else if (args[0] && !strcasecmp(args[0], "setsec")) {
+		if (wrc_ptp_get_mode() != WRC_MODE_SLAVE) {
+			shw_pps_gen_set_time((int64_t) atoi(args[1]), 0, PPSG_SET_SEC);
+			return 0;
+		}
+	} else if (args[0] && !strcasecmp(args[0], "setnsec")) {
+		if (wrc_ptp_get_mode() != WRC_MODE_SLAVE) {
+			shw_pps_gen_set_time(0, atoi(args[1]), PPSG_SET_NSEC);
+			return 0;
+		}
 	} else if (args[0] && !strcasecmp(args[0], "raw")) {
 		mprintf("%d %d\n", (uint32_t) sec, nsec);
 		return 0;

softpll/hw/pps_gen_regs.h

@@ -2,17 +2,19 @@
   Register definitions for slave core: WR Switch PPS generator and RTC
 
   * File           : pps_gen_regs.h
-  * Author         : auto-generated by wbgen2 from wrsw_pps_gen.wb
-  * Created        : Thu Oct 27 21:29:19 2011
+  * Author         : auto-generated by wbgen2 from pps_gen_wb.wb
+  * Created        : Fri Jul 26 15:09:09 2013
   * Standard       : ANSI C
 
-    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE wrsw_pps_gen.wb
+    THIS FILE WAS GENERATED BY wbgen2 FROM SOURCE FILE pps_gen_wb.wb
     DO NOT HAND-EDIT UNLESS IT'S ABSOLUTELY NECESSARY!
 
 */
 
-#ifndef __WBGEN2_REGDEFS_WRSW_PPS_GEN_WB
-#define __WBGEN2_REGDEFS_WRSW_PPS_GEN_WB
+#ifndef __WBGEN2_REGDEFS_PPS_GEN_WB_WB
+#define __WBGEN2_REGDEFS_PPS_GEN_WB_WB
+
+#include <inttypes.h>
 
 #if defined( __GNUC__)
 #define PACKED __attribute__ ((packed))
@@ -72,6 +74,12 @@
 /* definitions for field: Timecode output(UTC+cycles) valid in reg: External sync control register */
 #define PPSG_ESCR_TM_VALID                    WBGEN2_GEN_MASK(2, 1)
 
+/* definitions for field: Set seconds counter in reg: External sync control register */
+#define PPSG_ESCR_SEC_SET                     WBGEN2_GEN_MASK(3, 1)
+
+/* definitions for field: Set nanoseconds counter in reg: External sync control register */
+#define PPSG_ESCR_NSEC_SET                    WBGEN2_GEN_MASK(4, 1)
+
 PACKED struct PPSG_WB {
   /* [0x0]: REG Control Register */
   uint32_t CR;