wr2rf_vme: use records for phy

894091f2 · Tristan Gingold · 97a617b4 · 894091f2
Commit 894091f2 authored May 16, 2023 by Tristan Gingold
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Showing with 25 additions and 47 deletions

wr2rf_vme.vhd hdl/top/wr2rf_vme/wr2rf_vme.vhd +25 -47

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--- a/hdl/top/wr2rf_vme/wr2rf_vme.vhd
+++ b/hdl/top/wr2rf_vme/wr2rf_vme.vhd
@@ -33,6 +33,7 @@ use work.gencores_pkg.all;
 use work.wishbone_pkg.all;
 use work.vme64x_pkg.all;
 use work.wrcore_pkg.all;
+use work.endpoint_pkg.all;
 use work.wr_fabric_pkg.all;
 use work.wr_board_pkg.all;
 use work.streamers_pkg.all;
@@ -372,24 +373,13 @@ architecture rtl of wr2rf_vme is
  signal gtx_qpll_ref_clk, gtx_qpll_clk, gtx_qpll_locked : std_logic;
  signal gtx_qpll_reset                                  : std_logic;

-  signal phy_tx_data      : std_logic_vector(15 downto 0);
-  signal phy_tx_k         : std_logic_vector(1 downto 0);
-  signal phy_tx_disparity : std_logic;
-  signal phy_tx_enc_err   : std_logic;
-  signal phy_rx_data      : std_logic_vector(15 downto 0);
-  signal phy_rx_rbclk     : std_logic;
-  signal phy_rx_k         : std_logic_vector(1 downto 0);
-  signal phy_rx_enc_err   : std_logic;
-  signal phy_rst          : std_logic;
-  signal phy_loopen       : std_logic;
  --loopen_i determines (7 Series Transceiver User Guide(UG476) Figure 2-23 and Table 2-37):
  --'0' => gtx_loopback = "000" => normal operation
  --'1' => gtx_loopback = "100" => Far-end PMA Loopback
-  signal phy_loopen_vec   : std_logic_vector(2 downto 0);
-  signal phy_prbs_sel     : std_logic_vector(2 downto 0);
-  signal phy_rdy          : std_logic;
+  signal phy16_out :t_phy_16bits_from_wrc;
+  signal phy16_in :t_phy_16bits_to_wrc;

-  signal phy_rx_rbclk_sampled : std_logic;
+  signal phy_rst          : std_logic;

  signal phy_mdio_out  : t_wishbone_master_out;
  signal phy_mdio_in   : t_wishbone_master_in;
@@ -848,6 +838,11 @@ begin
            qpll_clk_o     => gtx_qpll_clk,
            qpll_ref_clk_o => gtx_qpll_ref_clk );

+    phy16_in.ref_clk        <= clk_sys_62m5;
+    phy16_in.sfp_tx_fault   <= sfp1_tx_fault_i;
+    phy16_in.sfp_los        <= sfp1_los_i;
+    sfp1_tx_disable_o <= phy16_out.sfp_tx_disable;
+
    inst_GTX_Link0 : entity work.wr_gtx_phy_kintex7_lp
        generic map(
            g_simulation => g_simulation)
@@ -862,24 +857,24 @@ begin
            clk_ref_i          => clk_sys_62m5,
            tx_clk_o           => open,
            tx_locked_o        => open,
-            tx_data_i          => phy_tx_data,
-            tx_k_i             => phy_tx_k,
-            tx_disparity_o     => phy_tx_disparity,
-            tx_enc_err_o       => phy_tx_enc_err,
-            rx_rbclk_o         => phy_rx_rbclk,
-            rx_data_o          => phy_rx_data,
-            rx_k_o             => phy_rx_k,
-            rx_enc_err_o       => phy_rx_enc_err,
-            rx_bitslide_o      => open,
-            rx_rbclk_sampled_o => phy_rx_rbclk_sampled,
-            rst_i              => phy_rst,
-            loopen_i           => phy_loopen,
-            loopen_vec_i       => "000",
+            tx_data_i          => phy16_out.tx_data,
+            tx_k_i             => phy16_out.tx_k,
+            tx_disparity_o     => phy16_in.tx_disparity,
+            tx_enc_err_o       => phy16_in.tx_enc_err,
+            rx_rbclk_o         => phy16_in.rx_clk,
+            rx_rbclk_sampled_o => phy16_in.rx_sampled_clk,
+            rx_data_o          => phy16_in.rx_data,
+            rx_k_o             => phy16_in.rx_k,
+            rx_enc_err_o       => phy16_in.rx_enc_err,
+            rx_bitslide_o      => phy16_in.rx_bitslide,
+            rdy_o              => phy16_in.rdy,
+            rst_i              => phy16_out.rst,
+            loopen_i           => phy16_out.loopen,
+            loopen_vec_i       => phy16_out.loopen_vec,
            pad_txn_o          => sfp1_tx_n_o,
            pad_txp_o          => sfp1_tx_p_o,
            pad_rxn_i          => sfp1_rx_n_i,
            pad_rxp_i          => sfp1_rx_p_i,
-            rdy_o              => phy_rdy,
            mdio_slave_i       => phy_mdio_out,
            mdio_slave_o       => phy_mdio_in);

@@ -924,25 +919,8 @@ begin
            dac_hpll_data_o        => dac_hpll_data_o,
            dac_dpll_load_p1_o     => dac_dpll_load_p1_o,
            dac_dpll_data_o        => dac_dpll_data_o,
-            phy16_i.ref_clk        => clk_sys_62m5,
-            phy16_i.tx_disparity   => phy_tx_disparity,
-            phy16_i.tx_enc_err     => phy_tx_enc_err,
-            phy16_i.rx_data        => phy_rx_data,
-            phy16_i.rx_k           => phy_rx_k,
-            phy16_i.rx_enc_err     => phy_rx_enc_err,
-            phy16_i.rx_bitslide    => "00000",  --phy_rx_bitslide,
-            phy16_i.rdy            => phy_rdy,
-            phy16_i.rx_clk         => phy_rx_rbclk,
-            phy16_i.rx_sampled_clk => phy_rx_rbclk_sampled,
-            phy16_i.sfp_tx_fault   => sfp1_tx_fault_i,
-            phy16_i.sfp_los        => sfp1_los_i,
-            phy16_o.tx_data        => phy_tx_data,
-            phy16_o.tx_k           => phy_tx_k,
-            phy16_o.rst            => phy_rst,
-            phy16_o.loopen         => phy_loopen,
-            phy16_o.loopen_vec     => phy_loopen_vec,
-            phy16_o.tx_prbs_sel    => phy_prbs_sel,
-            phy16_o.sfp_tx_disable => sfp1_tx_disable_o,
+            phy16_i                => phy16_in,
+            phy16_o                => phy16_out,
            phy_mdio_master_o      => phy_mdio_out,
            phy_mdio_master_i      => phy_mdio_in,
            led_act_o              => sfp1_led_active_o,