Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
W
wr2rf-vme
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
5
Issues
5
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
wr2rf-vme
Repository
36d21fba6e4b2cb4ac6d00dda0c5945101b1c123
Switch branch/tag
wr2rf-vme
hdl
rtl
registers
wr2rf_init_regs.cheby
Find file
Blame
History
Permalink
Clean wishbone signal namespace. Add pll_main_sync signal from pll_main_ctrl register.
· 36d21fba
John Gill
authored
Nov 26, 2020
36d21fba
wr2rf_init_regs.cheby
10.4 KB
Edit
Web IDE
Replace wr2rf_init_regs.cheby
×
Attach a file by drag & drop or
click to upload
Commit message
Replace wr2rf_init_regs.cheby
Replace file
Cancel
A new branch will be created in your fork and a new merge request will be started.
