Since driver reads periodically MDIO registers (timer function to check
link state) and HAL reads periodically LPDC MDIO registers (through
ioctl call) it happened once in a while that ioctl read operation would be
interleaved with timer function. As a result HAL would get the value
read from a different MDIO register than the one requested. This had
caused occasional link restarts on LPDC ports.

Adam Wujek authored 6 years ago and Jean-Claude BAU committed 5 years ago

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Maciej Lipinski authored 5 years ago and Jean-Claude BAU committed 5 years ago

the update includes
- some new registers that were added long time ago to HDL but
  the headers in SW were not updated
- Low Phase Drift configuration in MDIO/PCS and EP regs

baujc authored 6 years ago and Adam Wujek committed 5 years ago

The previous fix didn't solved completelly this issue: Negative nano WR
time adjustement generate a big jump of the monotonic clock used in
PPSI.
The current fix solves this issue.

baujc authored 6 years ago and Adam Wujek committed 5 years ago

The WR time adjustment was not taken into account in the driver. The
side effect was a big jump sometime of the monotonic clock used in PPSI
for the calculation of the timeouts. The side effect was that many
timeouts were firing too early.
The driver registration take now into account the adjustment and also
the calculation of the offset in the read() call.

Grzegorz Daniluk authored 6 years ago and Adam Wujek committed 6 years ago

Requires gateware synthesized with wr-switch-hdl commit:
b1b621b add bit to control WRS 1-PPS in termination

li hongming authored 6 years ago and Adam Wujek committed 6 years ago

    The bitslide module won't be reset when replugging the SFP and fiber, which may lead to
the wrong bitslide.

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

include CROSS_COMPILE

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

On modern switches the fan are driver by a dedicated FPGA core
that does the PWM. This module is not necessary anymore and not even
the kernel patches to make this module work.

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

The aim of this module is to register all the FPGA devices

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Actually, this is not what I want. I would like to just use an IRQ
resource with the correct IRQ number. What I want is to hide the IRQ
domain knowledge elsewhere. For instance, in the wrs_device module
that register all our devices. But, since I have to update the kernel
with the least number of changes I will leave this for the future.

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Copy the vic IRQ controller from the coht-vic repository.
The maintainer prefers to have a copy instead of a submodule.

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Many mach headers has been moved out of scope. Of course they are still
accessible by in an ugly way. Here I'm following the ugly way in order
to get something working.

What to do with this headers, perhaps, needs a discussion. I personally
think that we need our local headers with hardware definitions. The
reason is that we saw that in future kernel version some of these
headers complitely disappear. The hardware definitions never change so
we can safely copy them and remove a dependency with an external project.

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Instead of using clocksource_register() we use
clocksource_register_hz() as suggested

From kernel patch c7f798e3722610d486e951f04bbc00b6ba124d62
    clocksource: Get rid of clocksource_calc_mult_shift()

    No one is using this, so encourage the use of
    clocksource_register_hz/khz(), and drop this helper.

    Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
    [jstultz: tweaked commit message]
Signed-off-by: John Stultz <john.stultz@linaro.org>

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Today it is not really important to do this because all our modules are
within the project itself. But, at somepoint, we may use submodules
in order to integrate drivers from external sources; so, we need to export
our default values because we will not have control over the other projects

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

Federico Vaga authored 8 years ago and Adam Wujek committed 8 years ago

Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

The tool wrs_port_tx_control is not needed anymore, its functionality (putting
the link down) is available by performing:
ifconfig <port> down
Such functionality was added in the commit:
[Feature: 1336] kernel/wr_nic: disable SFP when interface is down

Revert the following commits:
2b6c0bc2 userspace/tools: wrs_port_tx_control, rename network interfaces from wrX to wriX+1
ceb0c512 userspace/tools/wrs_port_tx_control: Include some defines
97d8878d userspace/tools/wrs_port_tx_control: initialise register address
35a63cd9 kernel/wb-regs: Added address offsets to endpoint-mdio.h
d11514e5 userspace/tools/wrs_port_tx_control: added unistd.h
3184c2a7 doc/wrs-user-manual: added description of wrs_port_tx_control
4da29df3 userspace/tools: dynamically check maximum port number in wr_port_tx_control
4244c894

 userspace/tools: added a program to control the TX on a WRS port

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Keep low enable pin on SFP when the interface is down.
This commit makes the wrs_port_tx_control tool not needed anymore.

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

get rid of warning:
WARNING: "wr_nic_pstats_callback" [/home/awujek/wrs/wr-switch-sw/kernel/wr_pstats/wr_pstats.ko] undefined!

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Use 16 as length of wrint_name to let Alessandro sleep well.

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Tjeerd Pinkert authored 9 years ago and Adam Wujek committed 8 years ago

FIXME: I know that this is not the place to add these definitions
    they should be added/fixed in the .wb files.

FIXME:
- fixed #ifndef statement, the dash makes the compiler ignore the MDIO_WB
  part, which does not allow the file to be #included together with the
  endpoint-regs.h file. This should be done in the .wb file.

FIXME:
- added register address constants. This should be done in the .wb file

Note: I have no idea how to do this, someone who knows could probably fix
    the issues raised here.

Apply zero bias at every read from FPGA.

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

zeros keep only value read from FPGA at zeroing. The rest can be zeroed simply
in software.

Change the size of cntrs and userv from unsigned long long to uint64_t.

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Because 32bit kernel does not export 64bit values via sysctl in a easy way,
each pstats counter is split into two 32bit values which have to assembled into
one value in software that reads pstats counters.

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Set-up VLAN related registers during driver load instead of during opening
(bringing up) interfaces.
From now VLANs can be configured after loading the driver, but before bringing
up of interfaces. By this no switching is done without VLANs beeing configured.

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Alessandro Rubini authored 9 years ago and Adam Wujek committed 9 years ago

When the switch is loaded, some PTP outgoing frames get discarded, so we
never get back the timestamp interrupt.  By round-robin'ing the slots,
we get back to the "busy" one, which holds an skb structure that must be
released.

Without this freeing, the skb remains in the output queue of the
socket, and after a while we get EAGAIN in send() because the buffer
is full (400 frames, more or less). And the ptp port is stuck until we
reopen the socket.

This diagnosis exposed the fact that it's not an overflow of pending
descriptors, so I change the message from

  descriptor overflow: tx timestamp pending

to

  discarding tx frame that got no timestamp

Finally, this is pr_warn, not pr_err as we now know it's expected.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Alessandro Rubini authored 9 years ago and Adam Wujek committed 9 years ago

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>