[FEATURE #347] userspace/libwr/include/libwr: uplift softpll_export.h (SPLL_STATS_VER==7)

Add info about used LJD version.

Signed-off-by: Adam Wujek <dev_public@wujek.eu>

userspace/libwr/include/libwr/softpll_export.h

@@ -60,11 +60,35 @@
 #define ALIGN_STATE_WAIT_CLKIN 9
 #define ALIGN_STATE_WAIT_PLOCK 10
 
-#define SPLL_STATS_VER 6
+#define SPLL_STATS_VER 7
 #define SPLL_STATS_MAGIC 0x5b1157a7
 #define SPLL_LOOP_HELPER -1
 #define SPLL_LOOP_MAIN 0
 
+/*
+ * Low Jitter capabilities corner
+ */
+#define PERIPH_WRS_STD_NO_LJ    0
+#define PERIPH_WRS_STD_WITH_LJD 1
+#define PERIPH_WRS_FL_SYNCTECH  2
+#define PERIPH_WRS_LJ_SAFRAN    3
+#define PERIPH_END              4
+
+/* OSC_FREQ allows to recognize frequency of oscillator on LJD and
+ * also the fact that LJ functionality is intgrated */
+#define OSC_FREQ_10M        0x0
+#define OSC_FREQ_20M        0x1
+#define OSC_FREQ_25M        0x2
+#define OSC_FREQ_50M        0x3
+#define OSC_FREQ_100M       0x4
+#define OSC_FREQ_WRS_LJ_INT 0x7
+
+/* When Low Jitter functionlity integrated, periph_ID allows to detect
+ * the switch type */
+#define PERIPH_ID_WRS_FL_SYNCTECHv1_0 0x7
+#define PERIPH_ID_WRS_FL_SYNCTECHv1_5 0x6
+#define PERIPH_ID_WRS_LJ_SAFRAN       0x5
+
 struct spll_build_id {
 	char commit_id[32];
 	char build_date[16];
@@ -93,6 +117,9 @@ struct spll_stats {
 	int main_pll_ki;
 	int helper_pll_kp;
 	int helper_pll_ki;
+	int lj_periph_id;
+	int lj_osc_freq_type;
+	int lj_wrs_type;
 };
 
 extern struct spll_stats *stats;

userspace/tools/wrs_dump_shmem.c

@@ -80,6 +80,31 @@ char *spll_align_state_to_name[SPLL_ALIGN_STATE_MAX_N] = {
 	[ALIGN_STATE_WAIT_PLOCK] = "wait plock",
 };
 
+/* index of a the greatest number describing the SPLL align state +1 */
+char *spll_lj_periph_id_to_name[] = {
+	[PERIPH_ID_WRS_LJ_SAFRAN] = "Safran",
+	[PERIPH_ID_WRS_FL_SYNCTECHv1_5] = "SyncTech v1.0",
+	[PERIPH_ID_WRS_FL_SYNCTECHv1_0] = "SyncTech v1.5",
+};
+
+/* index of a the greatest number describing the SPLL align state +1 */
+char *spll_lj_osc_freq_type_to_name[] = {
+	[OSC_FREQ_10M]        = "10M",
+	[OSC_FREQ_20M]        = "20M",
+	[OSC_FREQ_25M]        = "25M",
+	[OSC_FREQ_50M]        = "50M",
+	[OSC_FREQ_100M]       = "100M",
+	[OSC_FREQ_WRS_LJ_INT] = "WRS LJ INT",
+};
+
+/* index of a the greatest number describing the SPLL align state +1 */
+char *spll_lj_wrs_type_to_name[] = {
+	[PERIPH_WRS_STD_NO_LJ]    = "Standard no LJ",
+	[PERIPH_WRS_STD_WITH_LJD] = "Standard with LJD",
+	[PERIPH_WRS_FL_SYNCTECH]  = "SyncTech FL",
+	[PERIPH_WRS_LJ_SAFRAN]    = "Safran LJ",
+};
+
 /* index of a the greatest number describing the qmode +1 */
 #define RTU_QMODE_MAX 5
 char *rtu_qmode_to_name[RTU_QMODE_MAX] = {
@@ -334,6 +359,46 @@ void dump_one_field(void *addr, struct dump_info *info, char *info_prefix)
 			printf("Unknown(%d)\n", i);
 		}
 		break;
+	case dump_type_spll_lj_periph_id:
+		i = *(uint32_t *)p;
+		switch (i) {
+		case PERIPH_ID_WRS_FL_SYNCTECHv1_0:
+		case PERIPH_ID_WRS_FL_SYNCTECHv1_5:
+		case PERIPH_ID_WRS_LJ_SAFRAN:
+			printf("%s(%d)\n", spll_lj_periph_id_to_name[i], i);
+			break;
+		default:
+			printf("Unknown(%d)\n", i);
+		}
+		break;
+	case dump_type_spll_lj_osc_freq_type:
+		i = *(uint32_t *)p;
+		switch (i) {
+		case OSC_FREQ_10M:
+		case OSC_FREQ_20M:
+		case OSC_FREQ_25M:
+		case OSC_FREQ_50M:
+		case OSC_FREQ_100M:
+		case OSC_FREQ_WRS_LJ_INT:
+			printf("%s(%d)\n", spll_lj_osc_freq_type_to_name[i], i);
+			break;
+		default:
+			printf("Unknown(%d)\n", i);
+		}
+		break;
+	case dump_type_spll_lj_wrs_type:
+		i = *(uint32_t *)p;
+		switch (i) {
+		case PERIPH_WRS_STD_NO_LJ:
+		case PERIPH_WRS_STD_WITH_LJD:
+		case PERIPH_WRS_FL_SYNCTECH:
+		case PERIPH_WRS_LJ_SAFRAN:
+			printf("%s(%d)\n", spll_lj_wrs_type_to_name[i], i);
+			break;
+		default:
+			printf("Unknown(%d)\n", i);
+		}
+		break;
 	case dump_type_rtu_filtering_entry_dynamic:
 		i = *(uint32_t *)p;
 		switch (i) {
@@ -823,6 +888,9 @@ struct dump_info spll_stats_info[] = {
 	DUMP_FIELD_SIZE(char, build_id.build_time, 16),
 	DUMP_FIELD_SIZE(char, build_id.build_by, 32),
 	DUMP_FIELD(int, ext_pps_latency_ps),
+	DUMP_FIELD(spll_lj_periph_id, lj_periph_id),
+	DUMP_FIELD(spll_lj_osc_freq_type, lj_osc_freq_type),
+	DUMP_FIELD(spll_lj_wrs_type, lj_wrs_type),
 };
 
 static int dump_spll_mem(struct spll_stats *spll)

userspace/tools/wrs_dump_shmem.h

@@ -64,6 +64,9 @@ enum dump_type {
 	dump_type_spll_mode,
 	dump_type_spll_seq_state,
 	dump_type_spll_align_state,
+	dump_type_spll_lj_periph_id,
+	dump_type_spll_lj_osc_freq_type,
+	dump_type_spll_lj_wrs_type,
 	/* rtu_filtering_entry enumerations */
 	dump_type_rtu_filtering_entry_dynamic,
 	dump_type_rtu_qmode,
@@ -104,6 +107,9 @@ typedef struct timeval timeval;
 typedef int            spll_mode;
 typedef int            spll_seq_state;
 typedef int            spll_align_state;
+typedef int            spll_lj_periph_id;
+typedef int            spll_lj_osc_freq_type;
+typedef int            spll_lj_wrs_type;
 typedef int            shmemState;
 typedef int            hal_mode;
 typedef int            hal_fsm;