binaries: disable 10MHz output in rt_cpu.elf

The output 9 => 10MHz output (CLK1), is disable until PLL is resync with WR to force the output of two different switches to be in phase.

binaries: disable 10MHz output in rt_cpu.elf
The output 9 => 10MHz output (CLK1), is disable until PLL is resync with WR to force the output of two different switches to be in phase.
47a041e0 · Benoit Rat · 490d802d · 47a041e0
Commit 47a041e0 authored 10 years ago by Benoit Rat
--- a/binaries/rt_cpu.elf
+++ b/binaries/rt_cpu.elf