barebox: use more relaxed nand timings

This is similar to the kernel patch, but its impact is less
important: barebox is only reading nand in our setup, and it looks
like it never failed (on the other hand, the times were definitely out
of specifications).

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

patches/barebox/v2014.04/0010-pm9g45-init-for-wrs-more-relaxed-nand-timings.patch

+From 6c6b9291c7c5c5a3e3f2bba7fc6c78ca55262f36 Mon Sep 17 00:00:00 2001
+From: Alessandro Rubini <rubini@gnudd.com>
+Date: Mon, 28 Jul 2014 18:28:25 +0200
+Subject: [PATCH 10/12] pm9g45/init (for wrs): more relaxed nand timings
+
+Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
+---
+ arch/arm/boards/pm9g45/init.c |   22 +++++++++++-----------
+ 1 files changed, 11 insertions(+), 11 deletions(-)
+
+diff --git a/arch/arm/boards/pm9g45/init.c b/arch/arm/boards/pm9g45/init.c
+index d4cea02..6d8f677 100644
+--- a/arch/arm/boards/pm9g45/init.c
++++ b/arch/arm/boards/pm9g45/init.c
+@@ -72,21 +72,21 @@ static struct atmel_nand_data nand_pdata = {
+ };
+ 
+ static struct sam9_smc_config pm_nand_smc_config = {
+-	.ncs_read_setup		= 0,
+-	.nrd_setup		= 1,
+-	.ncs_write_setup	= 0,
+-	.nwe_setup		= 1,
+-
+-	.ncs_read_pulse		= 2,
+-	.nrd_pulse		= 3,
+-	.ncs_write_pulse	= 3,
++	.ncs_read_setup		= 2,
++	.nrd_setup		= 4,
++	.ncs_write_setup	= 2,
++	.nwe_setup		= 4,
++
++	.ncs_read_pulse		= 4,
++	.nrd_pulse		= 4,
++	.ncs_write_pulse	= 4,
+ 	.nwe_pulse		= 4,
+ 
+-	.read_cycle		= 4,
+-	.write_cycle		= 7,
++	.read_cycle		= 12,
++	.write_cycle		= 12,
+ 
+ 	.mode			= AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
+-	.tdf_cycles		= 3,
++	.tdf_cycles		= 4,
+ };
+ 
+ static void pm_add_device_nand(void)
+-- 
+1.7.7.2
+