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Adam Wujek authored
With uRV/RISC-V as softCPU. It requires binaries/rt_cpu.elf binary to be for RISC-V. Signed-off-by:Adam Wujek <dev_public@wujek.eu>
a51e2346
With uRV/RISC-V as softCPU. It requires binaries/rt_cpu.elf binary to be for RISC-V.
Signed-off-by: Adam Wujek <dev_public@wujek.eu>