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Commit 06f80c57 authored by tomaszwlostowski's avatar tomaszwlostowski
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circuit_board/MCH_CLKB/MCH_CLKB.PrjPcb
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circuit_board/MCH_MAIN/MB_CPU_io_ports.SchDoc
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circuit_board/MCH_MAIN/MB_main.SchDoc
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circuit_board/MCH_MAIN/MCH_MAIN.PCBDOC
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circuit_board/MCH_MAIN/MCH_MAIN.PrjPcb
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circuit_board/MCH_MAIN/MCH_MAIN.PrjPcbStructure
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Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=CPU|SchDesignator=CPU|FileName=MB_CPU_io_ports.SchDoc|SymbolType=Normal|RawFileName=MB_CPU_io_ports.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=CPU|SchDesignator=CPU|FileName=MB_CPU_io_ports.SchDoc|SymbolType=Normal|RawFileName=MB_CPU_io_ports.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP0|SchDesignator=DP0|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP0|SchDesignator=DP0|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP1|SchDesignator=DP1|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP1|SchDesignator=DP1|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP2|SchDesignator=DP2|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP2|SchDesignator=DP2|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP3|SchDesignator=DP3|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP3|SchDesignator=DP3|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP4|SchDesignator=DP4|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP4|SchDesignator=DP4|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP5|SchDesignator=DP5|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP5|SchDesignator=DP5|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP6|SchDesignator=DP6|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP6|SchDesignator=DP6|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP7|SchDesignator=DP7|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=DP7|SchDesignator=DP7|FileName=MB_downlink_phy.SchDoc|SymbolType=Normal|RawFileName=MB_downlink_phy.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=FPGA|SchDesignator=FPGA|FileName=MB_main_FPGA.SchDoc|SymbolType=Normal|RawFileName=MB_main_FPGA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=FPGA|SchDesignator=FPGA|FileName=MB_main_FPGA.SchDoc|SymbolType=Normal|RawFileName=MB_main_FPGA.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=LETH|SchDesignator=LETH|FileName=MB_CPU_100m_ethernet.SchDoc|SymbolType=Normal|RawFileName=MB_CPU_100m_ethernet.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=LETH|SchDesignator=LETH|FileName=MB_CPU_100m_ethernet.SchDoc|SymbolType=Normal|RawFileName=MB_CPU_100m_ethernet.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=SENS|SchDesignator=SENS|FileName=MB_sensors.SchDoc|SymbolType=Normal|RawFileName=MB_sensors.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=SENS|SchDesignator=SENS|FileName=MB_sensors.SchDoc|SymbolType=Normal|RawFileName=MB_sensors.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_clocking|SchDesignator=U_MB_clocking|FileName=MB_clocking.SchDoc|SymbolType=Normal|RawFileName=MB_clocking.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_clocking|SchDesignator=U_MB_clocking|FileName=MB_clocking.SchDoc|SymbolType=Normal|RawFileName=MB_clocking.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_CPU_memory|SchDesignator=U_MB_CPU_memory|FileName=MB_CPU_memory.SchDoc|SymbolType=Normal|RawFileName=MB_CPU_memory.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_CPU_memory|SchDesignator=U_MB_CPU_memory|FileName=MB_CPU_memory.SchDoc|SymbolType=Normal|RawFileName=MB_CPU_memory.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_fpga_power|SchDesignator=U_MB_fpga_power|FileName=MB_fpga_power.SchDoc|SymbolType=Normal|RawFileName=MB_fpga_power.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_fpga_power|SchDesignator=U_MB_fpga_power|FileName=MB_fpga_power.SchDoc|SymbolType=Normal|RawFileName=MB_fpga_power.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_power_supply|SchDesignator=U_MB_power_supply|FileName=MB_power_supply.SchDoc|SymbolType=Normal|RawFileName=MB_power_supply.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_power_supply|SchDesignator=U_MB_power_supply|FileName=MB_power_supply.SchDoc|SymbolType=Normal|RawFileName=MB_power_supply.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_ZBT_memory|SchDesignator=U_MB_ZBT_memory|FileName=MB_ZBT_memory.SchDoc|SymbolType=Normal|RawFileName=MB_ZBT_memory.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=U_MB_ZBT_memory|SchDesignator=U_MB_ZBT_memory|FileName=MB_ZBT_memory.SchDoc|SymbolType=Normal|RawFileName=MB_ZBT_memory.SchDoc|ObjectKind=Sheet Symbol
Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=WD|SchDesignator=WD|FileName=MB_watchdog_mcu.SchDoc|SymbolType=Normal|RawFileName=MB_watchdog_mcu.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol Record=SheetSymbol|SourceDocument=MB_main.SchDoc|Designator=WD|SchDesignator=WD|FileName=MB_watchdog_mcu.SchDoc|SymbolType=Normal|RawFileName=MB_watchdog_mcu.SchDoc|ObjectKind=Sheet Symbol
Record=TopLevelDocument|FileName=MB_main.SchDoc Record=TopLevelDocument|FileName=MB_main.SchDoc
Record=FPGA_COMPONENT|BaseComponentDesignator=IC12|DocumentName=MB_main_FPGA.SchDoc|LibraryReference=EP3C120F780C7|SubProjectPath= |Configuration= |Description=Cyclone III Family FPGA, 531 I/O Pins, 4 PLLs, 780-Pin FBGA, Speed Grade 7, Commercial Grade|SubPartUniqueId1=EGAPETLP|SubPartDocPath1=MB_main_FPGA.SchDoc|SubPartUniqueId2=GRKUQEYM|SubPartDocPath2=MB_main_FPGA.SchDoc|SubPartUniqueId3=LMOYTUSG|SubPartDocPath3=MB_main_FPGA.SchDoc|SubPartUniqueId4=JWMXECIW|SubPartDocPath4=MB_main_FPGA.SchDoc|SubPartUniqueId5=PQBXOWHI|SubPartDocPath5=MB_main_FPGA.SchDoc|SubPartUniqueId6=AYPWGOXG|SubPartDocPath6=MB_main_FPGA.SchDoc|SubPartUniqueId7=NGNKRPJI|SubPartDocPath7=MB_main_FPGA.SchDoc|SubPartUniqueId8=DQPDTACF|SubPartDocPath8=MB_main_FPGA.SchDoc|SubPartUniqueId9=EHCTYWHU|SubPartDocPath9=MB_main_FPGA.SchDoc|SubPartUniqueId10=PAFWOFIU|SubPartDocPath10=MB_fpga_power.SchDoc|SubPartUniqueId11=MFSJOFFR|SubPartDocPath11=MB_fpga_power.SchDoc|SubPartUniqueId12=PIPKAPAR|SubPartDocPath12=MB_fpga_power.SchDoc|SubPartUniqueId13=STUJSJAY|SubPartDocPath13=MB_fpga_power.SchDoc Record=FPGA_COMPONENT|BaseComponentDesignator=IC12|DocumentName=MB_main_FPGA.SchDoc|LibraryReference=EP3C120F780C7|SubProjectPath= |Configuration= |Description=Cyclone III Family FPGA, 531 I/O Pins, 4 PLLs, 780-Pin FBGA, Speed Grade 7, Commercial Grade|SubPartUniqueId1=EGAPETLP|SubPartDocPath1=MB_main_FPGA.SchDoc|SubPartUniqueId2=GRKUQEYM|SubPartDocPath2=MB_main_FPGA.SchDoc|SubPartUniqueId3=LMOYTUSG|SubPartDocPath3=MB_main_FPGA.SchDoc|SubPartUniqueId4=JWMXECIW|SubPartDocPath4=MB_main_FPGA.SchDoc|SubPartUniqueId5=PQBXOWHI|SubPartDocPath5=MB_main_FPGA.SchDoc|SubPartUniqueId6=AYPWGOXG|SubPartDocPath6=MB_main_FPGA.SchDoc|SubPartUniqueId7=NGNKRPJI|SubPartDocPath7=MB_main_FPGA.SchDoc|SubPartUniqueId8=DQPDTACF|SubPartDocPath8=MB_main_FPGA.SchDoc|SubPartUniqueId9=EHCTYWHU|SubPartDocPath9=MB_main_FPGA.SchDoc|SubPartUniqueId10=PAFWOFIU|SubPartDocPath10=MB_fpga_power.SchDoc|SubPartUniqueId11=MFSJOFFR|SubPartDocPath11=MB_fpga_power.SchDoc|SubPartUniqueId12=PIPKAPAR|SubPartDocPath12=MB_fpga_power.SchDoc|SubPartUniqueId13=STUJSJAY|SubPartDocPath13=MB_fpga_power.SchDoc
circuit_board/common/libs/footprints.pcblib_viewstate
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[PCBViewState.Preferences] [PCBViewState.Preferences]
Current2D3DViewState=2D Current2D3DViewState=2D
PCBViewPort=Lx=497612220|Hx=502159798|Ly=498539115|Hy=501453765 PCBViewPort=Lx=497613755|Hx=502161333|Ly=498537765|Hy=501458361
2DConfigType=.config_2dsimple 2DConfigType=.config_2dsimple
2DConfiguration=RECORD=Board|CFGALL.CONFIGURATIONKIND=1|CFGALL.CONFIGURATIONDESC=Altium%20Standard%202D|CFG2D.PRIMDRAWMODE=00000000000000000000000|CFG2D.LAYEROPACITY=1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0|CFG2D.TOGGLELAYERS=1111111111111111111111111111111111111111111111111111111111111111111111111111111111|CFG2D.WORKSPACECOLALPHA0=1.0|CFG2D.WORKSPACECOLALPHA1=1.0|CFG2D.WORKSPACECOLALPHA2=1.0|CFG2D.WORKSPACECOLALPHA3=1.0|CFG2D.WORKSPACECOLALPHA4=1.0|CFG2D.WORKSPACECOLALPHA5=1.0|CFG2D.WORKSPACECOLALPHA6=1.0|CFG2D.MECHLAYERINSINGLELAYERMODE=0000000000000000|CFG2D.MECHLAYERLINKEDTOSHEET=0000000000000000|CFG2D.CURRENTLAYER=TOP|CFG2D.DISPLAYSPECIALSTRINGS=FALSE|CFG2D.SHOWTESTPOINTS=FALSE|CFG2D.SHOWORIGINMARKER=TRUE|CFG2D.SHOWSTATUSINFO=TRUE|CFG2D.SHOWPADNETS=TRUE|CFG2D.SHOWPADNUMBERS=TRUE|CFG2D.SHOWVIANETS=TRUE|CFG2D.USETRANSPARENTLAYERS=FALSE|CFG2D.PLANEDRAWMODE=2|CFG2D.DISPLAYNETNAMESONTRACKS=1|CFG2D.FROMTOSDISPLAYMODE=0|CFG2D.PADTYPESDISPLAYMODE=0|CFG2D.SINGLELAYERMODESTATE=3|CFG2D.ORIGINMARKERCOLOR=16777215|CFG2D.SHOWCOMPONENTREFPOINT=FALSE|CFG2D.COMPONENTREFPOINTCOLOR=16777215|CFG2D.POSITIVETOPSOLDERMASK=FALSE|CFG2D.POSITIVEBOTTOMSOLDERMASK=FALSE|CFG2D.TOPPOSITIVESOLDERMASKALPHA=0.500000|CFG2D.BOTTOMPOSITIVESOLDERMASKALPHA=0.500000 2DConfiguration=RECORD=Board|CFGALL.CONFIGURATIONKIND=1|CFGALL.CONFIGURATIONDESC=Altium%20Standard%202D|CFG2D.PRIMDRAWMODE=00000000000000000000000|CFG2D.LAYEROPACITY=1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0;1.0|CFG2D.TOGGLELAYERS=1111111111111111111111111111111111111111111111111111111111111111111111111111111111|CFG2D.WORKSPACECOLALPHA0=1.0|CFG2D.WORKSPACECOLALPHA1=1.0|CFG2D.WORKSPACECOLALPHA2=1.0|CFG2D.WORKSPACECOLALPHA3=1.0|CFG2D.WORKSPACECOLALPHA4=1.0|CFG2D.WORKSPACECOLALPHA5=1.0|CFG2D.WORKSPACECOLALPHA6=1.0|CFG2D.MECHLAYERINSINGLELAYERMODE=0000000000000000|CFG2D.MECHLAYERLINKEDTOSHEET=0000000000000000|CFG2D.CURRENTLAYER=TOP|CFG2D.DISPLAYSPECIALSTRINGS=FALSE|CFG2D.SHOWTESTPOINTS=FALSE|CFG2D.SHOWORIGINMARKER=TRUE|CFG2D.SHOWSTATUSINFO=TRUE|CFG2D.SHOWPADNETS=TRUE|CFG2D.SHOWPADNUMBERS=TRUE|CFG2D.SHOWVIANETS=TRUE|CFG2D.USETRANSPARENTLAYERS=FALSE|CFG2D.PLANEDRAWMODE=2|CFG2D.DISPLAYNETNAMESONTRACKS=1|CFG2D.FROMTOSDISPLAYMODE=0|CFG2D.PADTYPESDISPLAYMODE=0|CFG2D.SINGLELAYERMODESTATE=3|CFG2D.ORIGINMARKERCOLOR=16777215|CFG2D.SHOWCOMPONENTREFPOINT=FALSE|CFG2D.COMPONENTREFPOINTCOLOR=16777215|CFG2D.POSITIVETOPSOLDERMASK=FALSE|CFG2D.POSITIVEBOTTOMSOLDERMASK=FALSE|CFG2D.TOPPOSITIVESOLDERMASKALPHA=0.500000|CFG2D.BOTTOMPOSITIVESOLDERMASKALPHA=0.500000
2DConfigFullFileName=C:\Documents and Settings\twlostow\Application Data\AltiumDesignerSummer08\ViewConfigurations\Altium Standard 2D.config_2dsimple 2DConfigFullFileName=C:\Documents and Settings\twlostow\Application Data\AltiumDesignerSummer08\ViewConfigurations\Altium Standard 2D.config_2dsimple
3DConfigType=.config_3d 3DConfigType=.config_3d
3DConfiguration=RECORD=Board|CFGALL.CONFIGURATIONKIND=3|CFGALL.CONFIGURATIONDESC=Altium%203D%20Blue%20Configuration|CFG3D.POSITIVETOPSOLDERMASK=TRUE|CFG3D.POSITIVEBOTTOMSOLDERMASK=TRUE|CFG3D.SHOWCOMPONENTBODIES=FALSE|CFG3D.SHOWCOMPONENTSTEPMODELS=FALSE|CFG3D.COMPONENTMODELPREFERENCE=0|CFG3D.SHOWCOMPONENTSNAPMARKERS=TRUE|CFG3D.SHOWBOARDCORE=TRUE|CFG3D.SHOWBOARDPREPREG=TRUE|CFG3D.SHOWTOPSILKSCREEN=TRUE|CFG3D.SHOWBOTSILKSCREEN=TRUE|CFG3D.SHOWORIGINMARKER=TRUE|CFG3D.SHOWROOMS3D=FALSE|CFG3D.USESYSCOLORSFOR3D=FALSE|CFG3D.WORKSPACECOLOR=8553110|CFG3D.BOARDCORECOLOR=13761015|CFG3D.BOARDPREPREGCOLOR=0|CFG3D.TOPSOLDERMASKCOLOR=7026967|CFG3D.BOTSOLDERMASKCOLOR=7026967|CFG3D.COPPERCOLOR=3323360|CFG3D.TOPSILKSCREENCOLOR=15461355|CFG3D.BOTSILKSCREENCOLOR=15461355|CFG3D.WORKSPACELUMINANCEVARIATION=30|CFG3D.WORKSPACECOLOROPACITY=1.000000|CFG3D.BOARDCORECOLOROPACITY=0.890000|CFG3D.BOARDPREPREGCOLOROPACITY=0.500000|CFG3D.TOPSOLDERMASKCOLOROPACITY=0.860000|CFG3D.BOTSOLDERMASKCOLOROPACITY=0.860000|CFG3D.COPPERCOLOROPACITY=1.000000|CFG3D.TOPSILKSCREENCOLOROPACITY=1.000000|CFG3D.BOTSILKSCREENCOLOROPACITY=1.000000|CFG3D.BOARDTHICKNESSSCALING=1.000000 3DConfiguration=RECORD=Board|CFGALL.CONFIGURATIONKIND=3|CFGALL.CONFIGURATIONDESC=Altium%203D%20Blue%20Configuration|CFG3D.POSITIVETOPSOLDERMASK=TRUE|CFG3D.POSITIVEBOTTOMSOLDERMASK=TRUE|CFG3D.SHOWCOMPONENTBODIES=FALSE|CFG3D.SHOWCOMPONENTSTEPMODELS=FALSE|CFG3D.COMPONENTMODELPREFERENCE=0|CFG3D.SHOWCOMPONENTSNAPMARKERS=TRUE|CFG3D.SHOWBOARDCORE=TRUE|CFG3D.SHOWBOARDPREPREG=TRUE|CFG3D.SHOWTOPSILKSCREEN=TRUE|CFG3D.SHOWBOTSILKSCREEN=TRUE|CFG3D.SHOWORIGINMARKER=TRUE|CFG3D.SHOWROOMS3D=FALSE|CFG3D.USESYSCOLORSFOR3D=FALSE|CFG3D.WORKSPACECOLOR=8553110|CFG3D.BOARDCORECOLOR=13761015|CFG3D.BOARDPREPREGCOLOR=0|CFG3D.TOPSOLDERMASKCOLOR=7026967|CFG3D.BOTSOLDERMASKCOLOR=7026967|CFG3D.COPPERCOLOR=3323360|CFG3D.TOPSILKSCREENCOLOR=15461355|CFG3D.BOTSILKSCREENCOLOR=15461355|CFG3D.WORKSPACELUMINANCEVARIATION=30|CFG3D.WORKSPACECOLOROPACITY=1.000000|CFG3D.BOARDCORECOLOROPACITY=0.890000|CFG3D.BOARDPREPREGCOLOROPACITY=0.500000|CFG3D.TOPSOLDERMASKCOLOROPACITY=0.860000|CFG3D.BOTSOLDERMASKCOLOROPACITY=0.860000|CFG3D.COPPERCOLOROPACITY=1.000000|CFG3D.TOPSILKSCREENCOLOROPACITY=1.000000|CFG3D.BOTSILKSCREENCOLOROPACITY=1.000000|CFG3D.BOARDTHICKNESSSCALING=1.000000
3DConfigFullFileName=C:\Documents and Settings\twlostow\Application Data\AltiumDesignerSummer08\ViewConfigurations\Altium 3D Blue.config_3d 3DConfigFullFileName=C:\Documents and Settings\twlostow\Application Data\AltiumDesignerSummer08\ViewConfigurations\Altium 3D Blue.config_3d
3DCameraPosition=|LookAt.x=0|LookAt.y=0|LookAt.z=0|EyeRotation.x=0|EyeRotation.y=0|EyeRotation.z=0|EyeRotation.w=1|ZoomMult=0.000276190966325288|ViewSize.x=378|ViewSize.y=337 3DCameraPosition=|LookAt.x=0|LookAt.y=0|LookAt.z=0|EyeRotation.x=0|EyeRotation.y=0|EyeRotation.z=0|EyeRotation.w=1|ZoomMult=0.00027597106891881|ViewSize.x=378|ViewSize.y=337
ViewState_BoardFlipped=False ViewState_BoardFlipped=False
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