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White Rabbit Switch - Gateware
Commit 52c35760 authored by Maciej Lipinski's avatar Maciej Lipinski
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swcore: improvement on input/write to memory

parent bac2704e
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Showing with 355 additions and 356 deletions
swc_input_block.vhd
View file @ 52c35760
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swc_packet_mem_write_pump.vhd
View file @ 52c35760
......@@ -343,7 +343,7 @@ begin -- rtl
if( sync_i = '1') then
if(pgend = '1') then
if(pgend = '1' and drdy_i = '1') then -- see screenshot: swcore-writepump-p1
reg_full <= '1';
state_write <= S_WAIT_WRITE;
......@@ -352,7 +352,7 @@ begin -- rtl
-- during the last address of the page, the Linked list is being written, so we need
-- to wait for it to finish
elsif(mem_addr(c_swc_page_offset_width-1 downto 0) = allones(c_swc_page_offset_width-1 downto 0) and ll_idle = '0') then
elsif(mem_addr(c_swc_page_offset_width-1 downto 0) = allones(c_swc_page_offset_width-1 downto 0) and ll_idle = '0' ) then
state_write <= S_WAIT_LL_READY;
reg_full <= '1';
......@@ -373,13 +373,13 @@ begin -- rtl
end if;
elsif(drdy_i = '1' and flush_i ='1') then
state_write <= S_WRITE_DATA;
we_int <= '1';
reg_full <= '0';
cnt_last_word <= '0';
-- elsif(drdy_i = '1' and flush_i ='1') then
--
-- state_write <= S_WRITE_DATA;
-- we_int <= '1';
-- reg_full <= '0';
-- cnt_last_word <= '0';
--
else -- synch_i = '0'
-- if(cntr = to_unsigned(c_swc_packet_mem_multiply -1,cntr'length) and drdy_i = '1') then
......
swc_page_alloc.vhd
View file @ 52c35760
......@@ -191,7 +191,7 @@ architecture syn of swc_page_allocator is
type t_state is (IDLE, ALLOC_LOOKUP_L1, ALLOC_LOOKUP_L0_UPDATE,
FREE_CHECK_USECNT, FREE_RELEASE_PAGE, FREE_DECREASE_UCNT,
SET_UCNT, NASTY_WAIT--, FORCE_FREE_RELEASE_PAGE
SET_UCNT, NASTY_WAIT, DUMMY--, FORCE_FREE_RELEASE_PAGE
);
-- this represents high part of the page address (bit mapping)
......@@ -403,7 +403,7 @@ begin -- syn
pgaddr_to_free <= pgaddr_i;
state <= FREE_RELEASE_PAGE;
state <= DUMMY;-- FREE_RELEASE_PAGE;
-- decoding of provided code into low and high part
l0_wr_addr <= pgaddr_i(g_page_addr_bits-1 downto 5);
l0_rd_addr <= pgaddr_i(g_page_addr_bits-1 downto 5);
......@@ -424,6 +424,10 @@ begin -- syn
-- so the multiport allocator will also
-- take 3 cycles per request
end if;
when DUMMY =>
state <= FREE_RELEASE_PAGE;
done_o <= '0';
when NASTY_WAIT =>
......
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