- 26 Jul, 2019 3 commits
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Miguel Jimenez Lopez authored
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Miguel Jimenez Lopez authored
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Miguel Jimenez Lopez authored
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- 10 Jul, 2019 1 commit
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Miguel Jimenez Lopez authored
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- 26 May, 2016 2 commits
- 25 May, 2016 4 commits
- 20 May, 2016 1 commit
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Projects authored
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- 17 Feb, 2014 2 commits
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Miguel Jimenez Lopez authored
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Miguel Jimenez Lopez authored
- wr-nic.md improved - Move the dia diagram file to the imgsrc folder - Unnecessary files deleted - dio_core_pps image improved
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- 14 Feb, 2014 2 commits
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Miguel Jimenez Lopez authored
This package is needed to use 'H' option in figures.
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Miguel Jimenez Lopez authored
Note: In the wrpc-sw repository, a tag has been created for the new release version of wr-nic. This tag is "wrpc-v2.1-for-wrnic".
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- 10 Feb, 2014 1 commit
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Miguel Jimenez Lopez authored
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- 07 Feb, 2014 1 commit
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Miguel Jimenez Lopez authored
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- 06 Feb, 2014 2 commits
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Miguel Jimenez Lopez authored
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Miguel Jimenez Lopez authored
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- 04 Feb, 2014 1 commit
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Miguel Jimenez Lopez authored
- New wrc.ram file with updated filter rules. - Deleted unnecessary wrc_without_etherbone.ram file. - Deleted unnecessary ep_pfilter_old.c file in extra folder. - Updated ep_pfilter.c file in extra folder.
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- 26 Nov, 2013 9 commits
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Miguel Jimenez Lopez authored
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Benoit Rat authored
The first channel is set with 0 so that we force it to be output mode p/P & i/I mode will be only available for ch0, and D,d,1,0 will not be working (they will be seen as p/P).
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Miguel Jimenez Lopez authored
- Updated WR-NIC architecture diagram (dia file uploaded too) - Changes in doc/wr-nic.md to update information - Channel 0 output is dedicated for 1-PPS signal - P mode removed from DIO configuration registers - Added new section about remote configuration with Etherbone - Initial channel configuration is changed - Updated LM32 firmware generation
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Miguel Jimenez Lopez authored
wrc.ram: Updated to last version with Etherbone support. Copy ep_pfilter with etherbone to extra folder.
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Miguel Jimenez Lopez authored
- OUT is enable when one pulse occurs or 1-PPS ch0 signal is enable. - TERM enable when any resistor termination channel is enable
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Miguel Jimenez Lopez authored
dio: Added DIO ch0 input support and hold DIO ch0 output as 1-PPS dedicated signal. Deleted PPS mode in DIO core
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Miguel Jimenez Lopez authored
- Added Etherbone core as wishbone master in top crossbar. - Added a multiplexer to connect Etherbone and Nic core to wr-core. - Connected wr-core to Etherbone configuration space to access Etherbone registers. - wrc.ram: Updated with Etherbone support. (Old: wrc_without_etherbone.ram) - wrc.ram: Updated ep_pfilter for Etherbone packets. You can see this configuration in extra folder.
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Miguel Jimenez Lopez authored
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Miguel Jimenez Lopez authored
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- 04 Nov, 2013 1 commit
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Benoit Rat authored
We have remove all connections (input and output) of first channel to the DIO. In the future we might re-add the input connection...
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- 28 Oct, 2013 1 commit
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Benoit Rat authored
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- 10 Oct, 2013 5 commits
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Benoit Rat authored
gateware before putting it in /lib/firmware/fmc folder.
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Benoit Rat authored
We want to make clear that this architecture is to run a dio with wr-nic on a spec board. No changes in the code was made except renaming files.
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Grzegorz Daniluk authored
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Grzegorz Daniluk authored
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Benoit Rat authored
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- 25 Jul, 2013 1 commit
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Benoit Rat authored
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- 23 Jul, 2013 2 commits
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Benoit Rat authored
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Benoit Rat authored
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- 16 Jul, 2013 1 commit
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Benoit Rat authored
adding GM mode
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