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White Rabbit Network Interface Card
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White Rabbit Network Interface Card
Commits
fa2af8c7
Commit
fa2af8c7
authored
Mar 15, 2012
by
Rafael Rodriguez
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added class VIC_irq
parent
32a5255a
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2 changed files
with
38 additions
and
8 deletions
+38
-8
dio_fmc.py
software_test_dio_core/dio_fmc.py
+13
-0
test_pulse.py
software_test_dio_core/test_pulse.py
+25
-8
No files found.
software_test_dio_core/dio_fmc.py
View file @
fa2af8c7
...
...
@@ -11,6 +11,19 @@ from eeprom_24aa64 import *
from
onewire
import
*
from
ds18b20
import
*
class
VIC_irq
:
def
__init__
(
self
,
bus
,
base
):
self
.
bus
=
bus
;
self
.
base
=
base
;
def
set_reg
(
self
,
adr
,
value
):
self
.
bus
.
iwrite
(
0
,
self
.
base
+
adr
,
4
,
value
)
def
get_reg
(
self
,
adr
):
return
self
.
bus
.
iread
(
0
,
self
.
base
+
adr
,
4
)
class
CDAC5578
:
CMD_POWER_ON
=
0x40
...
...
software_test_dio_core/test_pulse.py
View file @
fa2af8c7
...
...
@@ -30,7 +30,7 @@ def main(default_directory="."):
print
"(expected room or computer temperature)"
print
print
"(------------CONFIGURING
LEMO
S--------------)"
print
"(------------CONFIGURING
DIO CHANNEL
S--------------)"
print
"Value of LEMOs with all drivers enabled and terminations disabled"
,
for
lemon
in
range
(
5
):
dio
.
set_term
(
lemon
,
0
)
...
...
@@ -38,6 +38,27 @@ def main(default_directory="."):
dio
.
set_in_threshold
(
lemon
,
30
)
print
"Input threshold set to an intermediate level ({})."
.
format
(
dio
.
get_in_threshold
(
0
))
print
"(------------CONFIGURING INTERRUPTS--------------)"
print
"(DIO Interrupts)"
# DIO Interrupts
dio
.
set_reg
(
0x64
,
0x1f
)
# Interrupts when the fifos have datas (UTC time from the pulse stamper)
mask_irq
=
dio
.
get_reg
(
0x68
)
print
"mask_irq =>"
,
mask_irq
status_irq
=
dio
.
get_reg
(
0x6c
)
print
"STATUS IRQ =>"
,
status_irq
# DIO Interrupts
print
"(VIC Interrupts)"
VIC
=
VIC_irq
(
spec
,
0xC0000
)
VIC
.
set_reg
(
0x0
,
0x3
)
# control register
control_irq_vic
=
VIC
.
get_reg
(
0x0
)
print
"control_irq_vic =>"
,
control_irq_vic
VIC
.
set_reg
(
0x8
,
0x3
)
# enable register
mask_irq_vic
=
VIC
.
get_reg
(
0x10
)
print
"mask_irq_vic =>"
,
mask_irq_vic
print
print
"(------------CONFIGURING TRIG UTC TIME FOR EACH LEMO--------------)"
print
"Note: The dummy time core is already running after configuring the fpga"
...
...
@@ -68,6 +89,7 @@ def main(default_directory="."):
dio
.
set_reg
(
0x3c
,
0x1f
)
#all trigX Enabled
exit
()
print
print
"Waiting pulse stamper from DIO 0...."
...
...
@@ -138,15 +160,10 @@ def main(default_directory="."):
print
"cycles DIO 4 =>"
,
cycles
print
status_irq_vic
=
dio
.
get_reg
(
0x4
)
print
"STATUS VIC IRQ =>"
,
status_irq_vic
#dio.set_reg(0x64, 0x1f)
# mask_irq = dio.get_reg(0x68)
# print "mask_irq =>", mask_irq
# status_irq = dio.get_reg(0x6c)
# print "STATUS IRQ =>", status_irq
#kbhit.getch()
# print "Waiting irq ..."
# gennum.wait_irq()
...
...
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