WR Streamers
WR Streamers provide to the user a FIFO-like interface over Ethernet. WR Streamers comprise of two VHDL modules to send and receive data:
- TX steamer takes a series of data words and encapsulates them into Ethernet Frames
- RX streamer does the opposite: decodes Ethernet frames into series of data words
User interface of a TX-RX streamer pair looks like a typical FIFO, with an Ethernet link inside.
Interface of Tx and Rx Streamer modules
/4216
I/F name | Description |
tx_data_i | Input data word of generic width to be sent by the Tx Streamer |
tx_valid_i | HIGH indicates that the tx_data_i contains a valid data word |
tx_dreq_o | Synchronous data request: HIGH indicates that the Tx Streamer can accommodate a data word in the following clock cycle |
tx_last_i | Last data word signal. When asserted, it indicates the last data word in a block |
tx_flush_i | Flush input. When asserted, the streamer will immediately send out all the data that is stored in its TX buffer, ignoring g_tx_timeout. |
tx_reset_seq_i | Reset sequence number. When asserted, the internal sequence number generator used to detect loss of frames is reset to 0. Advanced feature. |
I/F name | Description |
rx_data_o | Output data word of a generic width received by the Rx Streamer |
rx_valid_o | HIGH indicted that rx_data_o is outputting a valid data word. |
rx_dreq_i | Synchronous data request input: when HIGH, the streamer can output another data word in the subsequent clock cycle. |
rx_first_o | HIGH indicates the 1st data word of the block on rx_data_o. |
rx_last_o | HIGH indicates the last word of the data block on rx_data_o. |
rx_lost_o | Lost output: HIGH indicates that one or more of blocks have been lost. |
rx_latency_o | Latency measurement output: indicates the transport latency (between the TX streamer in remote device and this streamer), in clk_ref_i clock cycles. |
rx_latency_valid_o | HIGH when the latency on rx_latency_o is valid. |
Streamers principles
- Streamers transfer data words and transparently encapsulate them into Ethernet frames
- Data words can have width of n * 16 bits (generic: g_data_width)
- Data words can be grouped in blocks of arbitrary size
- Each block has independent sequence number and CRC