WhiteRabbit PTP core on VFC-HD
The WhiteRabbit (WR) PTP core project provides a board support package (BSP) for the VFC-HD board, an FMC carrier board based on an Arria V FPGA from Altera.
Gateware
The main ingredient of the BSP is the FPGA gateware, which comes in the form of a parametrisable VHDL module, to be instantiated in your own design.
By using this module, the user gains the benefit of instantiating all the necessary components of the WR PTP core (including the core itself, the PHY, PLLs, etc.) in one go, without having to delve into the implementation details, using a setup that has been tested and is known to work well on the VFC-HD board.
For users who need more control and flexibility over the process, it is suggested to use this code as a reference, and to consider using the Altera Arria V platform (which is also used internally in this module) for instantiating the PHY and (optionally) the PLLs.
Getting it
The FPGA gateware is available on the dlamprid-vfchd branch of the wr-cores repository (soon to be merged in proposed_master branch).
To get it, use:
git clone -b dlamprid-vfchd git:https://www.ohwr.org/hdl-core-lib/wr-cores.git
cd wr-cores; git submodule update --initUsing it
The top-level VHDL module, which you can include in your own VFC-HD project, is located under board/vfchd/xwrc_board_vfchd.vhd. A VHDL package with the definition of the module can be found under board/wr_board_pkg.vhd.
A detailed description of all generics and ports is also provided.
An example (Verilog) instantiation of this module can be found in the VFC-HD base project.
Software for the embedded CPU of the WR PTP core
The WR PTP core also instantiates an embedded softcore CPU (LM32), which requires its own software for proper operation.
Getting it
The embedded software for the WR PTP core is available on the eeprom_scan branch of the wrpc-sw repository (soon to be merged in proposed_master branch).
To get it, use:
git clone -b eeprom_scan git:https://www.ohwr.org/hdl-core-lib/wr-cores/wrpc-sw.git
cd wrpc-sw; git submodule update --initUsing it
Building and running the embedded software is described in the White Rabbit PTP Core User's Manual.
The embedded software can be built with the default settings, although it might be beneficial for testing and debugging to enable IP support (CONFIG_IP option), SNMP (SNMP option) and the auxiliary diagnostics interface (CONFIG_AUX_DIAG option).
The resulting binary can be either added to your HDL design, or injected to the CPU during runtime.
Software tools
Several software tools are provided, to facilitate the programming and monitoring of the WR PTP core on the VFC-HD.
These software tools are available on the master branch of the VFC-HD repository.
To get them, use:
git clone https://gitlab.cern.ch/dlamprid/VFC-HD.gitThe tools themselves are located in the Sw/WrPtp folder of the
repository.
A Makefile is provided for compiling the C sources on CERN Front-End
Computers. For other configurations, the only dependency for these tools
is on libvmebus, which in turn depends on the vmebridge kernel
driver (currently only supporting the TSI148 VME to PCI-X
bridge).
Both the driver and the library are available on the master branch of the vmebridge repository.
To get them, use:
git clone https://gitlab.cern.ch/cohtdrivers/vmebridge.gitThe repository also includes documentation on the driver and the library.
Virtual UART
Sw/WrPtp/vfchd-uart.c
This tool provides access to the virtual UART of the WR PTP core. This is very useful for controlling and monitoring of the WR PTP core, since the VFC-HD does not provide a physical UART.
The tool expects one argument, the slot where the VFC-HD card is located inside the VME crate.
Embedded software loader
Sw/WrPtp/vfchd-wrc_loader.c
This tool allows the user to inject code to the WR PTP core embedded CPU during runtime.
The tool expects two arguments, the slot where the VFC-HD card is located inside the VME crate and the path to the software binary for the embedded CPU.
WR EEPROM loader
Sw/WrPtp/vfchd-eeprom_loader.c
This tool allows the user to write to the I2C EEPROM of the WR PTP core, which is used for storing calibration values, initialisation scripts, etc.
This tool is useful on a new VFC-HD board, or when the EEPROM is corrupt, in order to "format" it for use by the WR PTP core. Once the EEPROM has the proper format, the WR PTP core will automatically use it to read/write values. The user can also read/write values via the virtual UART.
The tool expects two arguments, the slot where the VFC-HD card is located inside the VME crate and the path to the EEPROM image to load. An empty image, ready to be written to the EEPROM with this tool, is available
Support
To get support for the integration of the WR PTP core into your VFC-HD application, you can reach the WR developers on the white-rabbit-dev mailing list.
To get support for the VFC-HD board itself you can use one of the contacts mentioned in the VFC-HD project wiki.
20 December 2016