Skip to content

W
White Rabbit core collection
Commit fe9fac2f authored by Guido Visser's avatar Guido Visser
Browse files
Options

Modified for the HPSEC the 125MHz input is own W5 and W6 125.000 MHz GTX reference

parent 9aa94408
Pipeline #448 failed with stages
      in 2 minutes and 1 second
      Hide whitespace changes
      Inline Side-by-side
      Showing with 4 additions and 4 deletions
      top/spec7_write_design/spec7_write_top.xdc
      View file @ fe9fac2f
      ......@@ -4,12 +4,12 @@
      # -- Local oscillators
      # Bank 112 -- 125.000 MHz GTX reference
      set_property PACKAGE_PIN U6 [get_ports clk_125m_gtx_p_i]
      set_property PACKAGE_PIN U5 [get_ports clk_125m_gtx_n_i]
      #set_property PACKAGE_PIN U6 [get_ports clk_125m_gtx_p_i]
      #set_property PACKAGE_PIN U5 [get_ports clk_125m_gtx_n_i]
      # Set for extren 125MHz
      # Bank 111 -- 125.000 MHz GTX reference
      #set_property PACKAGE_PIN W6 [get_ports clk_125m_gtx_p_i]
      #set_property PACKAGE_PIN W5 [get_ports clk_125m_gtx_n_i]
      set_property PACKAGE_PIN W6 [get_ports clk_125m_gtx_p_i]
      set_property PACKAGE_PIN W5 [get_ports clk_125m_gtx_n_i]
      # Bank 111 -- FMC GBTCLK0_M2C
      #set_property PACKAGE_PIN AA6 [get_ports fmc_gbtclk0_m2c_p]
      #set_property PACKAGE_PIN AA5 [get_ports fmc_gbtclk0_m2c_n]
      ......
      Markdown is supported
      0% or
      You are about to add 0 people to the discussion. Proceed with caution.
      Finish editing this message first!
      Please register or to comment