Commit 46da6a1b authored by Peter Jansweijer's avatar Peter Jansweijer Committed by Grzegorz Daniluk

combined Kintex-Artix PLLs, created separate Div2 for direct_dmtd (124.992MHz)

parent 1c53def3
......@@ -52,6 +52,7 @@ package wr_xilinx_pkg is
component xwrc_platform_xilinx is
generic (
g_fpga_family : string := "spartan6";
g_direct_dmtd : boolean := FALSE;
g_with_external_clock_input : boolean := FALSE;
g_use_default_plls : boolean := TRUE;
g_aux_pll_cfg : t_auxpll_cfg_array := c_AUXPLL_CFG_ARRAY_DEFAULT;
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