Commits · b06b345b29180457fc5d39491a09fb3b54711131 · Projects / White Rabbit core collection · GitLab

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Aug 13, 2012
- sim/simdrv_defs.svh: added set_default_xfer_size() method · b06b345b
  Tomasz Wlostowski authored 12 years ago
  
  b06b345b
- sim/simdrv_minic: driver for latest HDL · 3a1fd6c1
  Tomasz Wlostowski authored 12 years ago
  
  3a1fd6c1
- platform/xilinx/wr_gtp_phy_spartan6: added generic for enabling/disabling GTP... · 5d5baa82
  Tomasz Wlostowski authored 12 years ago
```
platform/xilinx/wr_gtp_phy_spartan6: added generic for enabling/disabling GTP channels (saves logic/BUFG resources on unused channels)
```
  5d5baa82
Aug 09, 2012
- pps_gen: separate 1-pps output to drive DIO led · 6a20635e
  Grzegorz Daniluk authored 12 years ago
  
  wrpc-v2.0
  
  6a20635e
- tricks and constraints so that the deltaTx/Rx calibration is not necessary for... · 44f102fa
  Grzegorz Daniluk authored 12 years ago
```
tricks and constraints so that the deltaTx/Rx calibration is not necessary for every synthesized WRPC bitstream
```
  44f102fa
Aug 06, 2012
- spec_top: turn on vuart in wrpc · 44ca0443
  Grzegorz Daniluk authored 12 years ago
  
  44ca0443
Aug 02, 2012
- wrc_syscon: updated wb slave interface with latest wbgen · 4fd10123
  Grzegorz Daniluk authored 12 years ago
  
  4fd10123
- wr_mini_nic: updated wb slave interface with latest wbgen · ebf189f5
  Grzegorz Daniluk authored 12 years ago
  
  ebf189f5
- removed old softpll core · 2fc4de68
  Grzegorz Daniluk authored 12 years ago
  
  2fc4de68
Jul 31, 2012
- spec_top: modelsim does not like or-ing signals inside component · 34c5684c
  Grzegorz Daniluk authored 12 years ago
  
  34c5684c
- define platform dependent stuff only in syn/* Manifest · cad76f7c
  Grzegorz Daniluk authored 12 years ago
  
  cad76f7c
- wr_endpoint/wrc_core: moved t_txtsu_timestamp to endpoint's package · 55c70116
  Tomasz Wlostowski authored 12 years ago
  
  55c70116
Jul 26, 2012
- platform/xilinx/wr_gtx_phy_virtex6: generic parameter for choice between... · f943eba9
  Tomasz Wlostowski authored 12 years ago
```
platform/xilinx/wr_gtx_phy_virtex6: generic parameter for choice between global and regional clock buffers on RX clock
```
  f943eba9
- wr_endpoint: revert to old RX CRC checking algorithm (suspect for RX errors) · 4aef186b
  Tomasz Wlostowski authored 12 years ago
  
  4aef186b
Jul 24, 2012
- wr_softpll_ng: CRR_IN/CRR_OUT registers (counter sync) added · 5947d8b3
  Tomasz Wlostowski authored 12 years ago
  
  5947d8b3
- timing/dmtd_with_deglitcher: added counter syncing across multiple DDMTDs · be6a029d
  Tomasz Wlostowski authored 12 years ago
  
  be6a029d
Jul 16, 2012
- wr_pps_gen: use correct clock domain reset signal · bd858e7e
  Tomasz Wlostowski authored 12 years ago
  
  bd858e7e
- wr_mini_nic: partially fixed hang-on-RX-flood bug · d16c342d
  Tomasz Wlostowski authored 12 years ago
  
  d16c342d
- modules/wr_endpoint: Tx timestamp strobe generation fixed · b0658a59
  Tomasz Wlostowski authored 12 years ago
  
  b0658a59
Jul 12, 2012
- wbp_mux: signals naming cleaned up · 093909a6
  Grzegorz Daniluk authored 12 years ago
  
  093909a6
Jul 10, 2012
- Fix Etherbone in SPEC! · e70ae0bb
  Wesley W. Terpstra authored 12 years ago
  
  e70ae0bb
- Bump LM32 memory to 90KB => improves timings · 66bf1cc9
  Wesley W. Terpstra authored 12 years ago
  
  66bf1cc9
- Included Etherbone into SPEC top design. · caf9d67e
  Wesley W. Terpstra authored 12 years ago
```
However, timing constraints start failing.
```
  caf9d67e
- modules/wr_endpoint: area optimizations in ep_rx_crc_size_check · 56dab112
  Tomasz Wlostowski authored 12 years ago
  
  56dab112
Jul 09, 2012
- Connect Etherbone config slave to the WRC · b995d923
  Wesley W. Terpstra authored 12 years ago
  
  b995d923
- Disconnect SFP1 pins, or else quartus will want them configured. · 693284ce
  Wesley W. Terpstra authored 12 years ago
  
  693284ce
- Missing pin assignment: FPGA reset pin · bb0658b7
  Wesley W. Terpstra authored 12 years ago
  
  bb0658b7
- Fix from Tom to increase the maximum filter program length. · a580fc1d
  Wesley W. Terpstra authored 12 years ago
  
  a580fc1d
- Copy changes from SCU2 · 4e1c2e7b
  Wesley W. Terpstra authored 12 years ago
  
  4e1c2e7b
- Fix the indentation of the SCU top file => remove tabs. · 9fb02603
  Wesley W. Terpstra authored 12 years ago
  
  9fb02603
- fixed sfp i2c port · e00e3ee3
  Stefan Rauch authored 12 years ago and Wesley W. Terpstra committed 12 years ago
  
  e00e3ee3
- fixed pll comments · d17e7b82
  Stefan Rauch authored 12 years ago and Wesley W. Terpstra committed 12 years ago
  
  d17e7b82
- Enable LM32 on power-up · 19251141
  Wesley W. Terpstra authored 12 years ago
```
=> needed for preloaded firmware (ie: production cards)
=> needed to program firmware over JTAG
```
  19251141
- Enable LM32 debug interface · 9466c226
  Wesley W. Terpstra authored 12 years ago
```
=> needed for gdb connection
=> needed for loading LM32 firmware over JTAG
```
  9466c226
- Make the genum respect the Wishbone error line. · 9b88174b
  Wesley W. Terpstra authored 12 years ago
  
  9b88174b
- Output driven twice · ba60e1ac
  Wesley W. Terpstra authored 12 years ago
  
  ba60e1ac
- platform/xilinx/wr_xilinx_pkg: removed use_refclk_out generics causing compliation errors · 5852b50d
  Tomasz Wlostowski authored 12 years ago
  
  5852b50d
- wr_core: drive unused ack/err/rty wishbone signals to safe values · 535518a0
  Tomasz Wlostowski authored 12 years ago
  
  535518a0
Jul 06, 2012
- Merge branch 'wishbonized' of ohwr.org:hdl-core-lib/wr-cores into wishbonized · fbfe9bc0
  Tomasz Wlostowski authored 12 years ago
  
  fbfe9bc0
- wr_endpoint/ep_[tx/rx]_pcs_16bit: small fixes to infer FIFO18E1 on Virtex6 · ae55b0a0
  Tomasz Wlostowski authored 12 years ago
  
  ae55b0a0