Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

endpoint: small bugfixes in injection module and tx header processor + adding missing description to wbgen file

Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

bugfix in eth packet simulation class. It was not possible to set pck size at initialization (new function) -- bug fixed

Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

Endpoint: bugfix in h/w pck injection. The EOF signal generated when injecting h/w pck was not passed on the fabric.

Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

Endpoint-pfilter: adding Packet Filter microcode SystemVerilog class by Tom. It is used to program the endpoint pakcet filter

Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

Endpoint-VLANs: fixing VLAN related stuff in the rx_path of endpoint.  Enabling RTU_header_extraction for VLAN-tagged frames. Fixing bug related with wrong order in VLAN-tag. Correcting VLAN-tag insertion.

Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

endpoint: VLANs related bugfix. Adding extraction of VLAN-tag related info to the rtu_header_extract and correcting VLAN-related packet tx/rx simulation (there was wrong order of VLAN-tag)

Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

TRU-related fix: making sure that killing/reviving link in the middle of tx of frame is handled properly by Endpoint (hackish)

Maciej Lipinski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

TRU: adding features and I/F necessary for TRU unit. I/F for packet filter, flow ctr and adding functionality for killing link

Tomasz Wlostowski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

wr_endpoint/ep_tx_packet_injection: initial support for hardware packet injection (testbench-proven, no HW test yet)

Tomasz Wlostowski authored 12 years ago and Grzegorz Daniluk committed 11 years ago

wr_endpoint: modified VCR1 register to allow direct access to VLAN Untagged Set/Injection Template Buffer. Also, re-generated the wishbone slaves with new wbgen2

When WR PTP Core is set in GrandMaster mode it aligns its nanosecond
counter to 1-PPS and 10MHz coming from external source. When user wants
to set seconds counter to a desired value, the nanosecond counter was
also set (zeroed) causing additional (random) offset to the external
source.

Conflicts:
	modules/wr_softpll_ng/wr_softpll_ng.vhd

Tomasz Wlostowski authored 11 years ago and Grzegorz Daniluk committed 11 years ago

Signed-off-by: Grzegorz Daniluk <grzegorz.daniluk@cern.ch>

Tomasz Wlostowski authored 11 years ago and Grzegorz Daniluk committed 11 years ago

Signed-off-by: Grzegorz Daniluk <grzegorz.daniluk@cern.ch>

Tomasz Wlostowski authored 11 years ago and Grzegorz Daniluk committed 11 years ago

Signed-off-by: Grzegorz Daniluk <grzegorz.daniluk@cern.ch>

Tomasz Wlostowski authored 11 years ago and Grzegorz Daniluk committed 11 years ago

Signed-off-by: Grzegorz Daniluk <grzegorz.daniluk@cern.ch>

This had nothing to do with WR, wasn't used here, and is now removed.