endpoint/rx_path[bugfix]: masking out RTU request for received PAUSE frames (these frames never exit Endpoint). The bug (RTU request for no frame) where causing SWcore to go crazy

endpoint: added handling of priority-based Flow Control, exposed information about received PAUSE frames outside Endpoint - to be used by SWcore

endpoint: bugfix on tx path - frames to be transmitted where lost (not exited endpoint) if the start-of-cycle occured on stall (when the internal dreq was low)

pFilter: changed simulation driver so that the same mircocode can be nicely loaded many times to many ports

endpoint: small bugfixes in injection module and tx header processor + adding missing description to wbgen file

bugfix in eth packet simulation class. It was not possible to set pck size at initialization (new function) -- bug fixed

Endpoint: bugfix in h/w pck injection. The EOF signal generated when injecting h/w pck was not passed on the fabric.

Endpoint-pfilter: nasty bug fix. Done by hand according to Toms patch, commit to be skipped when rebasing

Endpoint-pfilter: adding Packet Filter microcode SystemVerilog class by Tom. It is used to program the endpoint pakcet filter

Endpoint-VLANs: fixing VLAN related stuff in the rx_path of endpoint.  Enabling RTU_header_extraction for VLAN-tagged frames. Fixing bug related with wrong order in VLAN-tag. Correcting VLAN-tag insertion.

endpoint: VLANs related bugfix. Adding extraction of VLAN-tag related info to the rtu_header_extract and correcting VLAN-related packet tx/rx simulation (there was wrong order of VLAN-tag)

TRU-related fix: making sure that killing/reviving link in the middle of tx of frame is handled properly by Endpoint (hackish)

TRU: adding features and I/F necessary for TRU unit. I/F for packet filter, flow ctr and adding functionality for killing link

wr_endpoint/ep_tx_packet_injection: initial support for hardware packet injection (testbench-proven, no HW test yet)

wr_endpoint: modified VCR1 register to allow direct access to VLAN Untagged Set/Injection Template Buffer. Also, re-generated the wishbone slaves with new wbgen2

Conflicts:
	top/spec_1_1/wr_core_demo/spec_top.ucf
	top/spec_1_1/wr_core_demo/spec_top.vhd