- Aug 05, 2013
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endpoint: added handling of priority-based Flow Control, exposed information about received PAUSE frames outside Endpoint - to be used by SWcore
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endpoint: bugfix on tx path - frames to be transmitted where lost (not exited endpoint) if the start-of-cycle occured on stall (when the internal dreq was low)
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pFilter: changed simulation driver so that the same mircocode can be nicely loaded many times to many ports
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endpoint: small bugfixes in injection module and tx header processor + adding missing description to wbgen file
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bugfix in eth packet simulation class. It was not possible to set pck size at initialization (new function) -- bug fixed
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Endpoint: bugfix in h/w pck injection. The EOF signal generated when injecting h/w pck was not passed on the fabric.
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Endpoint-pfilter: adding Packet Filter microcode SystemVerilog class by Tom. It is used to program the endpoint pakcet filter
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Endpoint-VLANs: fixing VLAN related stuff in the rx_path of endpoint. Enabling RTU_header_extraction for VLAN-tagged frames. Fixing bug related with wrong order in VLAN-tag. Correcting VLAN-tag insertion.
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endpoint: VLANs related bugfix. Adding extraction of VLAN-tag related info to the rtu_header_extract and correcting VLAN-related packet tx/rx simulation (there was wrong order of VLAN-tag)
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TRU-related fix: making sure that killing/reviving link in the middle of tx of frame is handled properly by Endpoint (hackish)
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TRU: adding features and I/F necessary for TRU unit. I/F for packet filter, flow ctr and adding functionality for killing link
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wr_endpoint/ep_tx_packet_injection: initial support for hardware packet injection (testbench-proven, no HW test yet)
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wr_endpoint: modified VCR1 register to allow direct access to VLAN Untagged Set/Injection Template Buffer. Also, re-generated the wishbone slaves with new wbgen2
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Tomasz Wlostowski authored
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Tomasz Wlostowski authored
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- Jul 29, 2013
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Grzegorz Daniluk authored
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Tomasz Wlostowski authored
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- Jul 26, 2013
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Grzegorz Daniluk authored
When WR PTP Core is set in GrandMaster mode it aligns its nanosecond counter to 1-PPS and 10MHz coming from external source. When user wants to set seconds counter to a desired value, the nanosecond counter was also set (zeroed) causing additional (random) offset to the external source.
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- Jul 25, 2013
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Tomasz Wlostowski authored
Conflicts: modules/wr_softpll_ng/wr_softpll_ng.vhd
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Tomasz Wlostowski authored
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- Jul 05, 2013
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Grzegorz Daniluk authored
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- Jun 12, 2013
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Mathias Kreider authored
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- Jun 04, 2013
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Signed-off-by:
Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
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Signed-off-by:
Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
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Signed-off-by:
Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
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Signed-off-by:
Grzegorz Daniluk <grzegorz.daniluk@cern.ch>
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- May 22, 2013
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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