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Commit faf5e9a3 authored by Tomasz Wlostowski's avatar Tomasz Wlostowski Committed by Grzegorz Daniluk
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wr_endpoint: don't reset the endpoint on LOS! - it breaks LPDC

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modules/wr_endpoint/ep_1000basex_pcs.vhd
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...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
-- Author : Tomasz Włostowski -- Author : Tomasz Włostowski
-- Company : CERN BE-CO-HT -- Company : CERN BE-CO-HT
-- Created : 2010-11-18 -- Created : 2010-11-18
-- Last update: 2017-02-20 -- Last update: 2019-04-18
-- Platform : FPGA-generic -- Platform : FPGA-generic
-- Standard : VHDL'93 -- Standard : VHDL'93
------------------------------------------------------------------------------- -------------------------------------------------------------------------------
...@@ -433,7 +433,8 @@ begin -- rtl ...@@ -433,7 +433,8 @@ begin -- rtl
mdio_mcr_pdown <= mdio_mcr_pdown_cpu or (not link_ctr_i); mdio_mcr_pdown <= mdio_mcr_pdown_cpu or (not link_ctr_i);
-- keep PHY reset also when SFP reports LOS (DL) -- keep PHY reset also when SFP reports LOS (DL)
serdes_rst_o <= (not pcs_reset_n) or mdio_mcr_pdown or serdes_sfp_los_i; serdes_rst_o <= (not pcs_reset_n) or mdio_mcr_pdown
;
U_MDIO_WB : ep_pcs_tbi_mdio_wb U_MDIO_WB : ep_pcs_tbi_mdio_wb
port map ( port map (
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