platform/xilinx/wr_gtp_phy: wait longer for a stable link before measuring the bitslide

It was not enough earlier. Once in a while after reconnecting the fiber we were
getting wrong bitslide which caused WR device locking on a wrong offset (e.g.
3ns, 7ns).

platform/xilinx/wr_gtp_phy/gtp_bitslide.vhd

@@ -79,11 +79,8 @@ architecture behavioral of gtp_bitslide is
   begin
     if(g_simulation /= 0) then
       return 256;
-    elsif(g_target = "spartan6") then
-      return 8192;
-    else
-      return 16384;
-    end if;
+		else
+			return 524288;
   end f_eval_sync_detect_threshold;
 
   function f_eval_pause_tics return integer is
@@ -103,7 +100,7 @@ architecture behavioral of gtp_bitslide is
   type t_bitslide_fsm_state is (S_SYNC_LOST, S_STABILIZE, S_SLIDE, S_PAUSE, S_GOT_SYNC, S_RESET_CDR);
   signal cur_slide : unsigned(4 downto 0);
   signal state     : t_bitslide_fsm_state;
-  signal counter   : unsigned(15 downto 0);
+  signal counter   : unsigned(19 downto 0);
 
   signal commas_missed : unsigned(4 downto 0);
   
@@ -189,7 +186,7 @@ begin  -- behavioral
 
         when S_GOT_SYNC =>
           gtp_rx_slide_o <= '0';
-          bitslide_o     <= std_logic_vector(cur_slide);
+          bitslide_o     <= std_logic_vector(cur_slide(4 downto 0));
           synced_o       <= '1';
           if(gtp_rx_byte_is_aligned_i = '0' or serdes_ready_i = '0') then
             gtp_rx_cdr_rst_o <= '1';