Skip to content
Snippets Groups Projects
Commit 71ba04a6 authored by Frederik Pfautsch (MLE)'s avatar Frederik Pfautsch (MLE)
Browse files

ZCU10x: Add HPC1 support for XM105


Signed-off-by: default avatarFrederik Pfautsch <frederik.pfautsch@missinglinkelectronics.com>
parent d8575bd1
1 merge request!18QPLL-based tuning on AMD ZCU102/ZCU106 devboards ("Light Rabbit")
...@@ -80,14 +80,25 @@ set_property PACKAGE_PIN AN14 [get_ports gpio_dip_sw_i[0]] ...@@ -80,14 +80,25 @@ set_property PACKAGE_PIN AN14 [get_ports gpio_dip_sw_i[0]]
set_property IOSTANDARD LVCMOS33 [get_ports gpio_dip_sw_i[0]] set_property IOSTANDARD LVCMOS33 [get_ports gpio_dip_sw_i[0]]
# SMA on XM105 on FMC HPC0 # SMA on XM105 on FMC HPC0
set_property PACKAGE_PIN T8 [get_ports clk_xm105_sma_o] set_property PACKAGE_PIN T8 [get_ports clk_hpc0_xm105_sma_o]
set_property PACKAGE_PIN R8 [get_ports pps_p_o[1]] set_property PACKAGE_PIN R8 [get_ports pps_hpc0_xm105_sma_o]
set_property IOSTANDARD LVDCI_18 [get_ports clk_xm105_sma_o] set_property IOSTANDARD LVDCI_18 [get_ports clk_hpc0_xm105_sma_o]
set_property IOSTANDARD LVDCI_18 [get_ports pps_p_o[1]] set_property IOSTANDARD LVDCI_18 [get_ports pps_hpc0_xm105_sma_o]
set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports clk_xm105_sma_o] set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports clk_hpc0_xm105_sma_o]
set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports pps_p_o[1]] set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports pps_hpc0_xm105_sma_o]
#set_property OFFCHIP_TERM NONE [get_ports clk_xm105_sma_o] #set_property OFFCHIP_TERM NONE [get_ports clk_hpc0_xm105_sma_o]
#set_property OFFCHIP_TERM NONE [get_ports pps_p_o[1]] #set_property OFFCHIP_TERM NONE [get_ports pps_hpc0_xm105_sma_o]
set_property DCI_CASCADE {66 67} [get_iobanks 65]
# SMA on XM105 on FMC HPC1
set_property PACKAGE_PIN P10 [get_ports clk_hpc1_xm105_sma_o]
set_property PACKAGE_PIN P9 [get_ports pps_hpc1_xm105_sma_o]
set_property IOSTANDARD LVDCI_18 [get_ports clk_hpc1_xm105_sma_o]
set_property IOSTANDARD LVDCI_18 [get_ports pps_hpc1_xm105_sma_o]
set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports clk_hpc1_xm105_sma_o]
set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports pps_hpc1_xm105_sma_o]
#set_property OFFCHIP_TERM NONE [get_ports clk_hpc1_xm105_sma_o]
#set_property OFFCHIP_TERM NONE [get_ports pps_hpc1_xm105_sma_o]
set_property DCI_CASCADE {66 67} [get_iobanks 65] set_property DCI_CASCADE {66 67} [get_iobanks 65]
# Dummy GTH to overwrite the device-specific LOCs in the generated transceiver xdc files # Dummy GTH to overwrite the device-specific LOCs in the generated transceiver xdc files
......
...@@ -90,6 +90,10 @@ set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports pps_hpc0_xm105_sma_o] ...@@ -90,6 +90,10 @@ set_property OUTPUT_IMPEDANCE RDRV_48_48 [get_ports pps_hpc0_xm105_sma_o]
#set_property OFFCHIP_TERM NONE [get_ports pps_hpc0_xm105_sma_o] #set_property OFFCHIP_TERM NONE [get_ports pps_hpc0_xm105_sma_o]
set_property DCI_CASCADE {66 67} [get_iobanks 65] set_property DCI_CASCADE {66 67} [get_iobanks 65]
# SMA on XM105 on FMC HPC1 -- NOT SUPPORTED --> tie to PMOD1_6 instead
set_property -dict {PACKAGE_PIN AP9 IOSTANDARD LVCMOS12 OFFCHIP_TERM NONE} [get_ports clk_hpc1_xm105_sma_o]
set_property -dict {PACKAGE_PIN AP10 IOSTANDARD LVCMOS12 OFFCHIP_TERM NONE} [get_ports pps_hpc1_xm105_sma_o]
# Dummy GTH to overwrite the device-specific LOCs in the generated transceiver xdc files # Dummy GTH to overwrite the device-specific LOCs in the generated transceiver xdc files
set_property PACKAGE_PIN R2 [get_ports dummy_gthrxp_i[0]] set_property PACKAGE_PIN R2 [get_ports dummy_gthrxp_i[0]]
set_property PACKAGE_PIN P4 [get_ports dummy_gthrxp_i[1]] set_property PACKAGE_PIN P4 [get_ports dummy_gthrxp_i[1]]
......
...@@ -69,6 +69,7 @@ entity zcu10x_ref_top is ...@@ -69,6 +69,7 @@ entity zcu10x_ref_top is
clk_sys_62m5_o : out std_logic; clk_sys_62m5_o : out std_logic;
clk_ref_125m_o : out std_logic; clk_ref_125m_o : out std_logic;
clk_hpc0_xm105_sma_o : out std_logic; clk_hpc0_xm105_sma_o : out std_logic;
clk_hpc1_xm105_sma_o : out std_logic;
--------------------------------------------------------------------------- ---------------------------------------------------------------------------
-- Dummy GTH channel required for QPLL SDM -- Dummy GTH channel required for QPLL SDM
...@@ -111,6 +112,7 @@ entity zcu10x_ref_top is ...@@ -111,6 +112,7 @@ entity zcu10x_ref_top is
user_led_o : out std_logic_vector(3 downto 0); user_led_o : out std_logic_vector(3 downto 0);
pps_p_o : out std_logic; pps_p_o : out std_logic;
pps_hpc0_xm105_sma_o : out std_logic; pps_hpc0_xm105_sma_o : out std_logic;
pps_hpc1_xm105_sma_o : out std_logic
); );
end entity zcu10x_ref_top; end entity zcu10x_ref_top;
...@@ -125,7 +127,7 @@ architecture top of zcu10x_ref_top is ...@@ -125,7 +127,7 @@ architecture top of zcu10x_ref_top is
signal clk_10m : std_logic; signal clk_10m : std_logic;
signal clk_xm105_sma : std_logic; signal clk_xm105_sma : std_logic;
signal pps_p : std_logic; signal pps_p : std_logic;
signal clk_xm105_sma_oddr : std_logic_vector(0 downto 0); signal clk_xm105_sma_oddr : std_logic_vector(1 downto 0);
signal sfp_scl_out, sfp_scl_in : std_logic; signal sfp_scl_out, sfp_scl_in : std_logic;
signal sfp_sda_out, sfp_sda_in : std_logic; signal sfp_sda_out, sfp_sda_in : std_logic;
...@@ -274,6 +276,8 @@ begin ...@@ -274,6 +276,8 @@ begin
clk_hpc0_xm105_sma_o <= clk_xm105_sma_oddr(0) when fmc_enable(0) = '1' else 'Z'; clk_hpc0_xm105_sma_o <= clk_xm105_sma_oddr(0) when fmc_enable(0) = '1' else 'Z';
pps_hpc0_xm105_sma_o <= pps_p when fmc_enable(0) = '1' else 'Z'; pps_hpc0_xm105_sma_o <= pps_p when fmc_enable(0) = '1' else 'Z';
clk_hpc1_xm105_sma_o <= clk_xm105_sma_oddr(1) when fmc_enable(1) = '1' else 'Z';
pps_hpc1_xm105_sma_o <= pps_p when fmc_enable(1) = '1' else 'Z';
clk_sys_62m5_o <= clk_sys_62m5; clk_sys_62m5_o <= clk_sys_62m5;
clk_ref_125m_o <= clk_ref_125m; clk_ref_125m_o <= clk_ref_125m;
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment