wr_core: testbench update

testbench/wrc_core/main_tb/Manifest.py

@@ -2,9 +2,20 @@ action = "simulation"
 fetchto = "../../../ip_cores"
 vlog_opt = "+incdir+../../../sim"
 
-files = [ "main.sv", "wb_gpio_port_notristates.vhd" ]
+files = [ "main.sv" ]
+
+modules = { "local" : [ 
+        "../../../ip_cores/general-cores",
+        "../../../modules/wr_endpoint",
+        "../../../modules/wr_mini_nic",
+        "../../../modules/wrc_core",
+        "../../../modules/wrc_lm32",
+        "../../../modules/wr_softpll",
+        "../../../modules/wrsw_pps_gen",
+        "../../../modules/timing"
+        
+        ]
+            };
+
 
-modules = { "local" : "../../.." };
-					
 
-					

testbench/wrc_core/main_tb/main.sv

@@ -2,22 +2,10 @@
 
 
 
-`include "if_wishbone.sv"
-`include "endpoint_regs.v"
-`include "endpoint_mdio.v"
 `include "tbi_utils.sv"
 
-`timescale 1ps/1ps
-
-`define EP_QMODE_ACCESS 0
-`define EP_QMODE_TRUNK 1
-`define EP_QMODE_UNQ 3
-
-// Clock periods (in picoseconds)
-const int c_RBCLK_PERIOD   = 8001;
-const int c_REFCLK_PERIOD  = 8000;
-
-`define ADDR_RST_GEN 'h62000
+`include "simdrv_defs.svh"
+`include "if_wb_master.svh"
 
 module main;
 
@@ -25,7 +13,7 @@ module main;
    wire clk_sys;
    wire rst_n;
 
-   IWishbone WB 
+   IWishboneMaster WB 
      (
       .clk_i(clk_sys),
       .rst_n_i(rst_n)
@@ -33,7 +21,7 @@ module main;
    
    tbi_clock_rst_gen
      #(
-       .g_rbclk_period(8002))
+       .g_rbclk_period(8000))
      clkgen(
 	    .clk_ref_o(clk_ref),
 	    .clk_sys_o(clk_sys),
@@ -57,12 +45,12 @@ module main;
    wire   phy_loopen;
 
    wr_core #(
-    .g_simulation             (1),
-    .g_virtual_uart(1),
-    .g_ep_rxbuf_size_log2     (12),
-    .g_dpram_initf            ("/home/slayer/wrpc-sw/hello.ram"),
-    .g_dpram_size             (16384),
-    .g_num_gpio               (8)
+             .g_simulation             (1),
+             .g_virtual_uart(1),
+             .g_ep_rxbuf_size_log2     (12),
+             .g_dpram_initf            ("sw/main.ram"),
+             .g_dpram_size             (16384),
+             .g_num_gpio               (8)
     )
    DUT (
 	.clk_sys_i      (clk_sys),
@@ -79,7 +67,7 @@ module main;
 	.dac_dpll_data_o (),
 
 	.gpio_o          (),
-    
+      
 	.uart_rxd_i       (1'b0),
 	.uart_txd_o       (),
 
@@ -106,59 +94,13 @@ module main;
         .phy_loopen_o(phy_lo),
 
 	.genrest_n        ()
-	);
+        );
 
- 
-   
-
-   wr_gtp_phy_spartan6
-     #(
-       .g_simulation(1),
-       .g_ch0_use_refclk_out (0),
-       .g_ch1_use_refclk_out (0)
-       ) PHY 
-       (
-        .ch0_ref_clk_i(clk_ref),
-        .ch0_ref_clk_o(),
-        .ch0_tx_data_i(8'h00),
-        .ch0_tx_k_i(1'b0),
-        .ch0_tx_disparity_o(),
-        .ch0_tx_enc_err_o(),
-        .ch0_rx_rbclk_o(),
-        .ch0_rx_data_o(),
-        .ch0_rx_k_o(),
-        .ch0_rx_enc_err_o(),
-        .ch0_rx_bitslide_o(),
-        .ch0_rst_i(1'b0),
-        .ch0_loopen_i(1'b0),
-
-        .ch1_ref_clk_i(clk_ref),
-        .ch1_ref_clk_o(),
-        .ch1_tx_data_i(phy_tx_data),
-        .ch1_tx_k_i(phy_tx_k),
-        .ch1_tx_disparity_o(phy_tx_disparity),
-        .ch1_tx_enc_err_o(phy_tx_enc_err),
-        .ch1_rx_data_o(phy_rx_data),
-        .ch1_rx_rbclk_o(phy_rx_rbclk),
-        .ch1_rx_k_o(phy_rx_k),
-        .ch1_rx_enc_err_o(phy_rx_enc_err),
-        .ch1_rx_bitslide_o(phy_rx_bitslide),
-        .ch1_rst_i(phy_rst),
-        .ch1_loopen_i(phy_lo),
-        .pad_txn0_o(),
-        .pad_txp0_o(),
-        .pad_rxn0_i(1'b0),
-        .pad_rxp0_i(1'b0),
-        .pad_txn1_o(sfp_txn_o),
-        .pad_txp1_o(sfp_txp_o),
-        .pad_rxn1_i(sfp_rxn_i),
-        .pad_rxp1_i(sfp_rxp_i));
-
-   assign sfp_rxp_i    = sfp_txp_o;
-   
-     assign sfp_rxn_i  = sfp_txn_o;
-   
-     
+   assign phy_rx_data       = phy_tx_data;
+   assign phy_rx_k          = phy_tx_k;
+   assign phy_tx_disparity  = 0;
+   assign phy_tx_enc_err    = 0;
+   assign phy_rx_enc_err    = 0;
    
 
    initial begin
@@ -166,26 +108,6 @@ module main;
       @(posedge rst_n);
       repeat(3) @(posedge clk_sys);
 
-      WB.write32('h40000, 1);
-      WB.write32('h40010, 'hdead);
-
-      forever begin
-	 reg[31:0] rval;
-	 
-	 repeat(100) @(posedge clk_sys);
-
-	 WB.read32('h40000, rval);
-
-	 if(rval[3]) begin
-	     WB.read32('h40004, rval);
-	    $display("Got TAG: %d", rval);
-	 end
-	 
-	 
-      end
-      
-       
-	
       
       
       

testbench/wrc_core/main_tb/run.do

+vlog -sv main.sv +incdir+"." +incdir+../../../sim
+-- make -f Makefile
+vsim -L unisim -t 10fs work.main -voptargs="+acc"
+set StdArithNoWarnings 1
+set NumericStdNoWarnings 1
+do wave.do
+radix -hexadecimal
+run 250us
+wave zoomfull
+radix -hexadecimal

testbench/wrc_core/main_tb/sw/main.ram

+write 0 98000000
+write 1 D0000000
+write 2 D0200000
+write 3 78010000
+write 4 38210000
+write 5 D0E10000
+write 6 F800003A
+write 7 34000000
+write 8 00000000
+write 9 00000000
+write a 00000000
+write b 00000000
+write c 00000000
+write d 00000000
+write e 00000000
+write f 00000000
+write 10 00000000
+write 11 00000000
+write 12 00000000
+write 13 00000000
+write 14 00000000
+write 15 00000000
+write 16 00000000
+write 17 00000000
+write 18 00000000
+write 19 00000000
+write 1a 00000000
+write 1b 00000000
+write 1c 00000000
+write 1d 00000000
+write 1e 00000000
+write 1f 00000000
+write 20 00000000
+write 21 00000000
+write 22 00000000
+write 23 00000000
+write 24 00000000
+write 25 00000000
+write 26 00000000
+write 27 00000000
+write 28 00000000
+write 29 00000000
+write 2a 00000000
+write 2b 00000000
+write 2c 00000000
+write 2d 00000000
+write 2e 00000000
+write 2f 00000000
+write 30 5B9D0000
+write 31 F8000020
+write 32 34010002
+write 33 F8000041
+write 34 E0000030
+write 35 34000000
+write 36 34000000
+write 37 34000000
+write 38 00000000
+write 39 00000000
+write 3a 00000000
+write 3b 00000000
+write 3c 00000000
+write 3d 00000000
+write 3e 00000000
+write 3f 00000000
+write 40 98000000
+write 41 781C0000
+write 42 3B9CFFFC
+write 43 781A0000
+write 44 3B5A8620
+write 45 78010000
+write 46 38210630
+write 47 34020000
+write 48 78030000
+write 49 38630A68
+write 4a C8611800
+write 4b F8000102
+write 4c 34010000
+write 4d 34020000
+write 4e 34030000
+write 4f F8000026
+write 50 E0000000
+write 51 379CFFC4
+write 52 5B810004
+write 53 5B820008
+write 54 5B83000C
+write 55 5B840010
+write 56 5B850014
+write 57 5B860018
+write 58 5B87001C
+write 59 5B880020
+write 5a 5B890024
+write 5b 5B8A0028
+write 5c 5B9E0034
+write 5d 5B9F0038
+write 5e 2B81003C
+write 5f 5B810030
+write 60 BB800800
+write 61 3421003C
+write 62 5B81002C
+write 63 C3A00000
+write 64 2B810004
+write 65 2B820008
+write 66 2B83000C
+write 67 2B840010
+write 68 2B850014
+write 69 2B860018
+write 6a 2B87001C
+write 6b 2B880020
+write 6c 2B890024
+write 6d 2B8A0028
+write 6e 2B9D0030
+write 6f 2B9E0034
+write 70 2B9F0038
+write 71 2B9C002C
+write 72 34000000
+write 73 C3C00000
+write 74 C3A00000
+write 75 379CFFEC
+write 76 5B9D0004
+write 77 78010000
+write 78 38210620
+write 79 28230008
+write 7a 2C24000C
+write 7b 28220004
+write 7c 28210000
+write 7d 0F840014
+write 7e 5B830010
+write 7f 5B82000C
+write 80 5B810008
+write 81 F800000A
+write 82 F8000028
+write 83 3402000E
+write 84 37810008
+write 85 F8000046
+write 86 34010055
+write 87 F8000009
+write 88 2B9D0004
+write 89 379C0014
+write 8a C3A00000
+write 8b 78010006
+write 8c 38210800
+write 8d 3402147B
+write 8e 58220004
+write 8f C3A00000
+write 90 379CFFFC
+write 91 5B9D0004
+write 92 78020006
+write 93 202300FF
+write 94 38420800
+write 95 28410000
+write 96 20210001
+write 97 5C20FFFE
+write 98 58430008
+write 99 3401000A
+write 9a 5C610003
+write 9b 3401000D
+write 9c FBFFFFF4
+write 9d 2B9D0004
+write 9e 379C0004
+write 9f C3A00000
+write a0 78010006
+write a1 38210800
+write a2 28210000
+write a3 20210002
+write a4 C3A00000
+write a5 78010006
+write a6 38210800
+write a7 2821000C
+write a8 202100FF
+write a9 C3A00000
+write aa 78010001
+write ab 34060002
+write ac 38210020
+write ad 78020001
+write ae 58260000
+write af 3842002C
+write b0 78050000
+write b1 58460000
+write b2 38A50A30
+write b3 34010000
+write b4 58A1002C
+write b5 78030002
+write b6 34010400
+write b7 58A1001C
+write b8 38630000
+write b9 340100C0
+write ba 78040002
+write bb 7802005D
+write bc 58610000
+write bd 38840008
+write be 3842C000
+write bf 78030002
+write c0 58820000
+write c1 3863000C
+write c2 78040000
+write c3 78020002
+write c4 34010003
+write c5 58610000
+write c6 38840630
+write c7 38420004
+write c8 58460000
+write c9 58A40014
+write ca C3A00000
+write cb 379CFFEC
+write cc 5B8B0014
+write cd 5B8C0010
+write ce 5B8D000C
+write cf 5B8E0008
+write d0 5B9D0004
+write d1 78050000
+write d2 38A50A30
+write d3 28A3001C
+write d4 28A60014
+write d5 78040001
+write d6 3463FF00
+write d7 00630002
+write d8 38840004
+write d9 58A30018
+write da B8207000
+write db 58860000
+write dc 58A60010
+write dd 3401003B
+write de B8406800
+write df B8406000
+write e0 54410002
+write e1 340C003C
+write e2 21810001
+write e3 B5816000
+write e4 34020000
+write e5 B8C00800
+write e6 35830006
+write e7 780B0000
+write e8 F8000065
+write e9 396B0A30
+write ea 29610010
+write eb B9C01000
+write ec B9A01800
+write ed 34210004
+write ee F800001F
+write ef 35810003
+write f0 00210002
+write f1 29620010
+write f2 34210001
+write f3 3C210002
+write f4 01830001
+write f5 B4411000
+write f6 34010000
+write f7 58410000
+write f8 29640010
+write f9 78019000
+write fa 38210000
+write fb B8611800
+write fc 78020001
+write fd 58830000
+write fe 38420000
+write ff 28410000
+write 100 B8401800
+write 101 38210001
+write 102 58410000
+write 103 28610000
+write 104 20210002
+write 105 4420FFFE
+write 106 2B9D0004
+write 107 2B8B0014
+write 108 2B8C0010
+write 109 2B8D000C
+write 10a 2B8E0008
+write 10b 379C0014
+write 10c C3A00000
+write 10d B8403800
+write 10e 3404000F
+write 10f B8601000
+write 110 B8204000
+write 111 B8203000
+write 112 B8E02800
+write 113 50820004
+write 114 B8E10800
+write 115 20210003
+write 116 4420000B
+write 117 44600008
+write 118 34040000
+write 119 B4A40800
+write 11a 40210000
+write 11b B4C41000
+write 11c 34840001
+write 11d 30410000
+write 11e 5C83FFFB
+write 11f B9000800
+write 120 C3A00000
+write 121 B8801800
+write 122 B8E00800
+write 123 B9002000
+write 124 B8402800
+write 125 28260000
+write 126 34A5FFF0
+write 127 58860000
+write 128 28260004
+write 129 58860004
+write 12a 28260008
+write 12b 58860008
+write 12c 2826000C
+write 12d 34210010
+write 12e 5886000C
+write 12f 34840010
+write 130 54A3FFF5
+write 131 3442FFF0
+write 132 00410004
+write 133 2043000F
+write 134 34210001
+write 135 3C210004
+write 136 34020003
+write 137 B4E13800
+write 138 B5012800
+write 139 50430011
+write 13a B8403000
+write 13b 34040000
+write 13c B4E41000
+write 13d 28420000
+write 13e B4A40800
+write 13f 34840004
+write 140 58220000
+write 141 C8640800
+write 142 5426FFFA
+write 143 3462FFFC
+write 144 00410002
+write 145 20430003
+write 146 34210001
+write 147 3C210002
+write 148 B4A12800
+write 149 B4E13800
+write 14a B8A03000
+write 14b B8E02800
+write 14c E3FFFFCB
+write 14d B8204000
+write 14e B8202800
+write 14f 34010003
+write 150 B8602000
+write 151 204900FF
+write 152 50230023
+write 153 A1010800
+write 154 44200009
+write 155 212200FF
+write 156 34030000
+write 157 B4A30800
+write 158 30220000
+write 159 34630001
+write 15a 5C64FFFD
+write 15b B9000800
+write 15c C3A00000
+write 15d 3D210008
+write 15e 3403000F
+write 15f B8290800
+write 160 3C220010
+write 161 B9003800
+write 162 B8412800
+write 163 B8603000
+write 164 B9000800
+write 165 B8801000
+write 166 54830011
+write 167 34030000
+write 168 34060003
+write 169 B4E31000
+write 16a 34630004
+write 16b 58450000
+write 16c C8830800
+write 16d 5426FFFC
+write 16e 3482FFFC
+write 16f 00410002
+write 170 20440003
+write 171 34210001
+write 172 3C210002
+write 173 B4E13800
+write 174 B8E02800
+write 175 5C80FFE0
+write 176 E3FFFFE5
+write 177 58250000
+write 178 58250004
+write 179 58250008
+write 17a 5825000C
+write 17b 3442FFF0
+write 17c 34210010
+write 17d 5446FFFA
+write 17e 3481FFF0
+write 17f 00220004
+write 180 2024000F
+write 181 34420001
+write 182 3C420004
+write 183 34010003
+write 184 B5023800
+write 185 5481FFE2
+write 186 B8E02800
+write 187 E3FFFFEE
+write 188 01020304
+write 189 05060708
+write 18a 090A0B0C
+write 18b 0D0E0000
+write 18c 0D0E0000

testbench/wrc_core/main_tb/wave.do

+onerror {resume}
+quietly WaveActivateNextPane {} 0
+add wave -noupdate /main/DUT/U_Endpoint/g_interface_mode
+add wave -noupdate /main/DUT/U_Endpoint/g_address_granularity
+add wave -noupdate /main/DUT/U_Endpoint/g_simulation
+add wave -noupdate /main/DUT/U_Endpoint/g_pcs_16bit
+add wave -noupdate /main/DUT/U_Endpoint/g_rx_buffer_size
+add wave -noupdate /main/DUT/U_Endpoint/g_with_rx_buffer
+add wave -noupdate /main/DUT/U_Endpoint/g_with_flow_control
+add wave -noupdate /main/DUT/U_Endpoint/g_with_timestamper
+add wave -noupdate /main/DUT/U_Endpoint/g_with_dpi_classifier
+add wave -noupdate /main/DUT/U_Endpoint/g_with_vlans
+add wave -noupdate /main/DUT/U_Endpoint/g_with_rtu
+add wave -noupdate /main/DUT/U_Endpoint/g_with_leds
+add wave -noupdate /main/DUT/U_Endpoint/clk_ref_i
+add wave -noupdate /main/DUT/U_Endpoint/clk_sys_i
+add wave -noupdate /main/DUT/U_Endpoint/rst_n_i
+add wave -noupdate /main/DUT/U_Endpoint/pps_csync_p1_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_rst_o
+add wave -noupdate /main/DUT/U_Endpoint/phy_loopen_o
+add wave -noupdate /main/DUT/U_Endpoint/phy_enable_o
+add wave -noupdate /main/DUT/U_Endpoint/phy_syncen_o
+add wave -noupdate /main/DUT/U_Endpoint/phy_ref_clk_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_tx_data_o
+add wave -noupdate /main/DUT/U_Endpoint/phy_tx_k_o
+add wave -noupdate /main/DUT/U_Endpoint/phy_tx_disparity_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_tx_enc_err_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_rx_data_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_rx_clk_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_rx_k_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_rx_enc_err_i
+add wave -noupdate /main/DUT/U_Endpoint/phy_rx_bitslide_i
+add wave -noupdate /main/DUT/U_Endpoint/gmii_tx_clk_i
+add wave -noupdate /main/DUT/U_Endpoint/gmii_txd_o
+add wave -noupdate /main/DUT/U_Endpoint/gmii_tx_en_o
+add wave -noupdate /main/DUT/U_Endpoint/gmii_tx_er_o
+add wave -noupdate /main/DUT/U_Endpoint/gmii_rx_clk_i
+add wave -noupdate /main/DUT/U_Endpoint/gmii_rxd_i
+add wave -noupdate /main/DUT/U_Endpoint/gmii_rx_er_i
+add wave -noupdate /main/DUT/U_Endpoint/gmii_rx_dv_i
+add wave -noupdate /main/DUT/U_Endpoint/src_o
+add wave -noupdate /main/DUT/U_Endpoint/src_i
+add wave -noupdate /main/DUT/U_Endpoint/snk_o
+add wave -noupdate /main/DUT/U_Endpoint/snk_i
+add wave -noupdate /main/DUT/U_Endpoint/txtsu_port_id_o
+add wave -noupdate /main/DUT/U_Endpoint/txtsu_frame_id_o
+add wave -noupdate /main/DUT/U_Endpoint/txtsu_tsval_o
+add wave -noupdate /main/DUT/U_Endpoint/txtsu_valid_o
+add wave -noupdate /main/DUT/U_Endpoint/txtsu_ack_i
+add wave -noupdate /main/DUT/U_Endpoint/rtu_full_i
+add wave -noupdate /main/DUT/U_Endpoint/rtu_almost_full_i
+add wave -noupdate /main/DUT/U_Endpoint/rtu_rq_strobe_p1_o
+add wave -noupdate /main/DUT/U_Endpoint/rtu_rq_smac_o
+add wave -noupdate /main/DUT/U_Endpoint/rtu_rq_dmac_o
+add wave -noupdate /main/DUT/U_Endpoint/rtu_rq_vid_o
+add wave -noupdate /main/DUT/U_Endpoint/rtu_rq_has_vid_o
+add wave -noupdate /main/DUT/U_Endpoint/rtu_rq_prio_o
+add wave -noupdate /main/DUT/U_Endpoint/rtu_rq_has_prio_o
+add wave -noupdate /main/DUT/U_Endpoint/wb_i
+add wave -noupdate /main/DUT/U_Endpoint/wb_o
+add wave -noupdate /main/DUT/U_Endpoint/led_link_o
+add wave -noupdate /main/DUT/U_Endpoint/led_act_o
+TreeUpdate [SetDefaultTree]
+WaveRestoreCursors {{Cursor 1} {67408050000 fs} 0}
+configure wave -namecolwidth 183
+configure wave -valuecolwidth 100
+configure wave -justifyvalue left
+configure wave -signalnamewidth 1
+configure wave -snapdistance 10
+configure wave -datasetprefix 0
+configure wave -rowmargin 4
+configure wave -childrowmargin 2
+configure wave -gridoffset 0
+configure wave -gridperiod 1
+configure wave -griddelta 40
+configure wave -timeline 0
+configure wave -timelineunits ns
+update
+WaveRestoreZoom {28718575420 fs} {159968575420 fs}