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White Rabbit
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ef1c83d3
Commit
ef1c83d3
authored
6 years ago
by
Javier Serrano
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Some modifications after discussing with Dimitris and Enrico
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762dca72
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presentations/WR_Javier_EFTS_2018/wr_efts_2018.tex
+54
-74
54 additions, 74 deletions
presentations/WR_Javier_EFTS_2018/wr_efts_2018.tex
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ef1c83d3
...
...
@@ -139,8 +139,8 @@
\item
Ethernet features (VLAN)
\&
protocols (SNMP)
\end{itemize}
\begin{itemize}
\item
\color
{
Blue
}{
High accuracy
synchroni
z
ation
}
\item
\color
{
Red
}{
Reliable and low-latency Control Data
}
\item
\color
{
Blue
}{
Sub-ns
synchroni
s
ation
}
\item
\color
{
Red
}{
Guaranteed (by design) upper bound in frame latency
}
\end{itemize}
\column
{
.6
\textwidth
}
...
...
@@ -190,67 +190,31 @@
\begin{frame}
{
White Rabbit technology
}
\begin{block}
{
Based on
}
\begin{itemize}
\item
Gigabit Ethernet over fib
e
r
\item
Gigabit Ethernet over fibr
e
\item
IEEE-1588 protocol
\end{itemize}
\end{block}
\pause
\begin{block}
{
Enhanced with
}
\begin{itemize}
\item
Layer 1 syntoni
z
ation
\item
Layer 1 syntoni
s
ation
\item
Digital Dual Mixer Time Difference (DDMTD)
\item
Link delay model
\end{itemize}
\end{block}
\end{frame}
\begin{frame}
{
Open Systems Interconnection(OSI) network model
}
\begin{center}
\includegraphics
<1>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
0.pdf
}
\includegraphics
<2>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
7.pdf
}
\includegraphics
<3>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
6.pdf
}
\includegraphics
<4>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
5.pdf
}
\includegraphics
<5>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
4.pdf
}
\includegraphics
<6>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
3.pdf
}
\includegraphics
<7>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
2.pdf
}
\includegraphics
<8>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
1.pdf
}
\end{center}
\end{frame}
\begin{frame}
{
Ethernet switches in a nutshell
}
\begin{center}
\includegraphics
<1>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
eth
_
sw.pdf
}
\includegraphics
<2->[width=.3
\textheight
]
{
misc/home
_
switch.png
}
\includegraphics
<2->[width=.7
\textheight
]
{
misc/prof
_
switch.png
}
\includegraphics
<2>[width=.8
\textwidth
]
{
misc/switch
_
in
_
nutshell
_
mac.pdf
}
\includegraphics
<3>[width=.8
\textwidth
]
{
misc/switch
_
in
_
nutshell
_
1-2
_
mac.pdf
}
\includegraphics
<4>[width=.8
\textwidth
]
{
misc/switch
_
in
_
nutshell
_
1-3
_
mac.pdf
}
\includegraphics
<5>[width=.8
\textwidth
]
{
misc/switch
_
in
_
nutshell
_
1-2
_
3-1
_
mac.pdf
}
\end{center}
\end{frame}
\begin{frame}
{
White Rabbit in OSI model
}
\begin{center}
\includegraphics
<1>[width=.6
\textwidth
]
{
misc/osi
_
layers
_
WR.pdf
}
\end{center}
%\begin{center}
% \begin{adjustwidth}{-1.5em}{-1.5em}
% \includegraphics<2>[width=1.1\textwidth]{misc/switch-and-osi.pdf}
% \end{adjustwidth}
%\end{center}
\end{frame}
\begin{frame}
{
White Rabbit technology
}
\begin{block}
{
Based on
}
\begin{itemize}
\item
Gigabit Ethernet over fib
e
r
\item
Gigabit Ethernet over fibr
e
\item
IEEE-1588 protocol
\end{itemize}
\end{block}
\begin{block}
{
Enhanced with
}
\begin{itemize}
\item
Layer 1 syntoni
z
ation
\item
Layer 1 syntoni
s
ation
\item
Digital Dual Mixer Time Difference (DDMTD)
\item
Link delay model
\end{itemize}
...
...
@@ -265,7 +229,7 @@
\end{center}
\column
{
.75
\textwidth
}
\begin{itemize}
\item
Frame-based synchroni
z
ation protocol.
\item
Frame-based synchroni
s
ation protocol.
\item
Simple calculations:
\begin{itemize}
\item
link
$
delay
_{
ms
}$
$
\delta
_{
ms
}
=
\frac
{
(
t
_{
4
}
-
t
_{
1
}
)
-
(
t
_{
3
}
-
t
_{
2
}
)
}{
2
}$
...
...
@@ -281,7 +245,7 @@
\end{columns}
\end{frame}
\begin{frame}
{
Layer 1 Syntoni
z
ation
}
\begin{frame}
{
Layer 1 Syntoni
s
ation
}
%\begin{block}{Common clock for the entire network}
\begin{itemize}
\item
All network devices use the same physical layer clock.
...
...
@@ -309,15 +273,6 @@
\end{frame}
%\begin{frame}{Deglitching algorithm -- to backup slides?}
%\end{frame}
\begin{frame}
{
SoftPLL
}
\begin{center}
\includegraphics
[width=.9\textwidth]
{
protocol/dmpll
_
diagram-slides.pdf
}
\end{center}
\end{frame}
\begin{frame}
{
Link delay model
}
\begin{center}
\includegraphics
[width=0.9\textwidth]
{
calibration/link-model.pdf
}
...
...
@@ -325,7 +280,7 @@
\begin{itemize}
\item
static hardware delays:
$
\Delta
_{
TXM
}$
,
$
\Delta
_{
RXM
}$
,
$
\Delta
_{
TXS
}$
,
$
\Delta
_{
RXS
}$
\item
semi-static hardware delays:
$
\epsilon
_
M
$
,
$
\epsilon
_
S
$
\item
fib
e
r asymmetry coefficient:
$
\alpha
=
\frac
{
\delta
_{
MS
}
-
\delta
_{
SM
}}{
\delta
_{
SM
}}$
\item
fibr
e
asymmetry coefficient:
$
\alpha
=
\frac
{
\delta
_{
MS
}
-
\delta
_{
SM
}}{
\delta
_{
SM
}}$
\end{itemize}
\pause
\begin{block}
{}
...
...
@@ -420,25 +375,61 @@
\end{frame}
\frame
{
\frametitle
{
An aside: PLL block diagram
}
\includegraphics
[width=\textwidth]
{
misc/pll
_
model.pdf
}
}
\frame
{
\frametitle
{
An aside: PLL transfer functions
}
\begin{block}
{
Total output phase spectrum
}
$
\Phi
_
o
(
s
)
=
H
(
s
)
\cdot
\Phi
_
i
(
s
)
+
E
(
s
)
\cdot
\Phi
_
n
(
s
)
$
\end{block}
\begin{block}
{
System transfer function (low pass)
}
$
H
(
s
)
=
\frac
{
K
_{
VCO
}
K
_
d F
(
s
)
}{
s
+
K
_{
VCO
}
K
_
d F
(
s
)
}
$
\end{block}
\begin{block}
{
Error transfer function (high pass)
}
$
E
(
s
)
=
1
-
H
(
s
)
=
\frac
{
s
}{
s
+
K
_{
VCO
}
K
_
d F
(
s
)
}
$
\end{block}
}
\frame
{
\frametitle
{
An aside: jitter optimisation
}
\includegraphics
[height=0.7\textwidth]
{
misc/pll
_
psd.pdf
}
}
\begin{frame}
{
Test setup for 10MHz switch output
}
\begin{center}
\includegraphics
[width=\textwidth]
{
measurements/WRSlowJitter/rsz
_
experimental
_
setup.png
}
\end{center}
\end{frame}
\begin{frame}
{
WR switch clocking scheme
}{
Thanks to Mattia Rizzi for the work and
the figures in this section
}
\begin{center}
\includegraphics
[width=.85\textwidth]
{
switch/wrs
_
v3
_
3
_
clocking.png
}
\end{center}
\end{frame}
\begin{frame}
{
MMCM noise
}
\begin{center}
\includegraphics
[height=.7\textheight]
{
switch/mmcm
_
noise.png
}
\end{center}
\end{frame}
\begin{frame}
{
WR Switch: low jitter daughterboard
}
\begin{columns}
\column
{
.35
\textwidth
}
\includegraphics
[width=.8\textheight, angle=90]
{
measurements/WRSlowJitter/rsz
_
3d
_
image
__
1
_
.jpg
}
\column
{
.65
\textwidth
}
\begin{itemize}
\item
Current release of WRS in GM mode has suboptimal performance on both jitter (9ps RMS 1Hz-100kHz) and ADEV (1.4E-11
$
\tau
$
=1s ENBW 50Hz)
\item
Current release of WRS in GM mode has sub
-
optimal performance on both jitter (9ps RMS 1Hz-100kHz) and ADEV (1.4E-11
$
\tau
$
=1s ENBW 50Hz)
\item
A daughterboard was designed, produced and tested to improve the performance
\item
Modified WRS improves performance on both jitter (
$
<
$
2ps RMS 10Hz-100kHz) and ADEV (
$
<
$
5E-13
$
\tau
$
=1s ENBW 50Hz) in GM mode
\end{itemize}
\end{columns}
\end{frame}
\begin{frame}
{
Daughterboard Test Setup
}
\begin{center}
\includegraphics
[width=\textwidth]
{
measurements/WRSlowJitter/rsz
_
experimental
_
setup.png
}
\end{center}
\end{frame}
\begin{frame}
{
Test Results in GM mode: PM noise
}
\begin{center}
\includegraphics
[height=.85\textheight]
{
measurements/WRSlowJitter/pn.png
}
...
...
@@ -451,17 +442,6 @@
\end{center}
\end{frame}
\begin{frame}
{
Test Results in Slave mode: PM noise
}
\begin{center}
\includegraphics
[height=.85\textheight]
{
measurements/WRSlowJitter/slave
_
pn.png
}
\end{center}
\end{frame}
\begin{frame}
{
Test Results in Slave mode: Modified ADEV
}
\begin{center}
\includegraphics
[height=.85\textheight]
{
measurements/WRSlowJitter/slave
_
mdev.png
}
\end{center}
\end{frame}
\section
{
Current developments
}
\subsection
{}
...
...
@@ -472,14 +452,14 @@
networks as well as improving the phase noise and performing extensive network stress tests.
\end{block}
\pause
\begin{block}
{
Standardi
z
ation
}
\begin{block}
{
Standardi
s
ation
}
IEEE 1588 revision process is ongoing and contains a sub-committee (High
Accuracy) dedicated to White Rabbit. Revised standard expected in 2019.
\end{block}
\pause
\begin{block}
{
Robustness
}
Based on redundant information and fast switch-over between
redundant fib
e
rs and switches.
redundant fibr
e
s and switches.
\end{block}
\end{frame}
...
...
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