strange behavior during BLT accesses

Single access modes working fine in both the VFC and SVEC boards, plugged in each slot.

BLT and MBLT test on the VFC board:

• Slot 8: Ok
• Other slots: sometimes the test fails

BLT and MBLT test on the SVEC board:
Sometimes the test fails in all the slots.

The probability that the test fails, it increases if the board (both VFC and SVEC) is plugged in a slot near the slot 1.
The VME is an asynchronous protocol so the behavior must be the same in all the slot. Is not it?

Using the same vme64x core and the slot 8, the BLT test fails on the SVEC and it is ok on the VFC. Why?