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Simple VME FMC Carrier SVEC
Commit 76e01d95 authored by mcattin's avatar mcattin
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Add generic top level entities for afpga and sfpga.

parent a5061b00
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hdl/svec_v0_afpga.ucf → hdl/afpga/svec_v0_afpga.ucf
View file @ 76e01d95
......@@ -25,87 +25,87 @@ NET "vme_berr_o" LOC = R3;
NET "vme_as_n_i" LOC = P6;
NET "vme_a_oe_n_o" LOC = N4;
NET "vme_a_dir_o" LOC = N5;
NET "vme_irq7_o" LOC = R7;
NET "vme_irq6_o" LOC = AH2;
NET "vme_irq5_o" LOC = AF2;
NET "vme_irq4_o" LOC = N9;
NET "vme_irq3_o" LOC = N10;
NET "vme_irq2_o" LOC = AH4;
NET "vme_irq1_o" LOC = AG4;
NET "vme_ga4_i" LOC = V9;
NET "vme_ga3_i" LOC = V10;
NET "vme_ga2_i" LOC = AJ1;
NET "vme_ga1_i" LOC = AH1;
NET "vme_ga0_i" LOC = V7;
NET "vme_d31_b" LOC = AK3;
NET "vme_d30_b" LOC = AH3;
NET "vme_d29_b" LOC = T8;
NET "vme_d28_b" LOC = T9;
NET "vme_d27_b" LOC = AK4;
NET "vme_d26_b" LOC = AJ4;
NET "vme_d25_b" LOC = W6;
NET "vme_d24_b" LOC = W7;
NET "vme_d23_b" LOC = AB6;
NET "vme_d22_b" LOC = AB7;
NET "vme_d21_b" LOC = W9;
NET "vme_d20_b" LOC = W10;
NET "vme_d19_b" LOC = AK5;
NET "vme_d18_b" LOC = AH5;
NET "vme_d17_b" LOC = AD6;
NET "vme_d16_b" LOC = AC6;
NET "vme_d15_b" LOC = AA6;
NET "vme_d14_b" LOC = AA7;
NET "vme_d13_b" LOC = T6;
NET "vme_d12_b" LOC = T7;
NET "vme_d11_b" LOC = AG5;
NET "vme_d10_b" LOC = AE5;
NET "vme_d9_b" LOC = Y11;
NET "vme_d8_b" LOC = W11;
NET "vme_d7_b" LOC = AF6;
NET "vme_d6_b" LOC = AE6;
NET "vme_d5_b" LOC = Y8;
NET "vme_d4_b" LOC = Y9;
NET "vme_d3_b" LOC = AE7;
NET "vme_d2_b" LOC = AD7;
NET "vme_d1_b" LOC = AA9;
NET "vme_d0_b" LOC = AA10;
NET "vme_am5_i" LOC = V8;
NET "vme_am4_i" LOC = AG3;
NET "vme_am3_i" LOC = AF3;
NET "vme_am2_i" LOC = AF4;
NET "vme_am1_i" LOC = AE4;
NET "vme_am0_i" LOC = AK2;
NET "vme_a31_b" LOC = T2;
NET "vme_a30_b" LOC = T3;
NET "vme_a29_b" LOC = T4;
NET "vme_a28_b" LOC = U1;
NET "vme_a27_b" LOC = U3;
NET "vme_a26_b" LOC = U4;
NET "vme_a25_b" LOC = U5;
NET "vme_a24_b" LOC = V1;
NET "vme_a23_b" LOC = V2;
NET "vme_a22_b" LOC = W1;
NET "vme_a21_b" LOC = W3;
NET "vme_a20_b" LOC = AA4;
NET "vme_a19_b" LOC = AA5;
NET "vme_a18_b" LOC = Y1;
NET "vme_a17_b" LOC = Y2;
NET "vme_a16_b" LOC = Y3;
NET "vme_a15_b" LOC = Y4;
NET "vme_a14_b" LOC = AC1;
NET "vme_a13_b" LOC = AC3;
NET "vme_a12_b" LOC = AD1;
NET "vme_a11_b" LOC = AD2;
NET "vme_a10_b" LOC = AB3;
NET "vme_a9_b" LOC = AB4;
NET "vme_a8_b" LOC = AD3;
NET "vme_a7_b" LOC = AD4;
NET "vme_a6_b" LOC = AC4;
NET "vme_a5_b" LOC = AC5;
NET "vme_a4_b" LOC = N7;
NET "vme_a3_b" LOC = N8;
NET "vme_a2_b" LOC = AE1;
NET "vme_a1_b" LOC = AE3;
NET "vme_irq_o[7]" LOC = R7;
NET "vme_irq_o[6]" LOC = AH2;
NET "vme_irq_o[5]" LOC = AF2;
NET "vme_irq_o[4]" LOC = N9;
NET "vme_irq_o[3]" LOC = N10;
NET "vme_irq_o[2]" LOC = AH4;
NET "vme_irq_o[1]" LOC = AG4;
NET "vme_ga_i[4]" LOC = V9;
NET "vme_ga_i[3]" LOC = V10;
NET "vme_ga_i[2]" LOC = AJ1;
NET "vme_ga_i[1]" LOC = AH1;
NET "vme_ga_i[0]" LOC = V7;
NET "vme_d_b[31]" LOC = AK3;
NET "vme_d_b[30]" LOC = AH3;
NET "vme_d_b[29]" LOC = T8;
NET "vme_d_b[28]" LOC = T9;
NET "vme_d_b[27]" LOC = AK4;
NET "vme_d_b[26]" LOC = AJ4;
NET "vme_d_b[25]" LOC = W6;
NET "vme_d_b[24]" LOC = W7;
NET "vme_d_b[23]" LOC = AB6;
NET "vme_d_b[22]" LOC = AB7;
NET "vme_d_b[21]" LOC = W9;
NET "vme_d_b[20]" LOC = W10;
NET "vme_d_b[19]" LOC = AK5;
NET "vme_d_b[18]" LOC = AH5;
NET "vme_d_b[17]" LOC = AD6;
NET "vme_d_b[16]" LOC = AC6;
NET "vme_d_b[15]" LOC = AA6;
NET "vme_d_b[14]" LOC = AA7;
NET "vme_d_b[13]" LOC = T6;
NET "vme_d_b[12]" LOC = T7;
NET "vme_d_b[11]" LOC = AG5;
NET "vme_d_b[10]" LOC = AE5;
NET "vme_d_b[9]" LOC = Y11;
NET "vme_d_b[8]" LOC = W11;
NET "vme_d_b[7]" LOC = AF6;
NET "vme_d_b[6]" LOC = AE6;
NET "vme_d_b[5]" LOC = Y8;
NET "vme_d_b[4]" LOC = Y9;
NET "vme_d_b[3]" LOC = AE7;
NET "vme_d_b[2]" LOC = AD7;
NET "vme_d_b[1]" LOC = AA9;
NET "vme_d_b[0]" LOC = AA10;
NET "vme_am_i[5]" LOC = V8;
NET "vme_am_i[4]" LOC = AG3;
NET "vme_am_i[3]" LOC = AF3;
NET "vme_am_i[2]" LOC = AF4;
NET "vme_am_i[1]" LOC = AE4;
NET "vme_am_i[0]" LOC = AK2;
NET "vme_a_b[31]" LOC = T2;
NET "vme_a_b[30]" LOC = T3;
NET "vme_a_b[29]" LOC = T4;
NET "vme_a_b[28]" LOC = U1;
NET "vme_a_b[27]" LOC = U3;
NET "vme_a_b[26]" LOC = U4;
NET "vme_a_b[25]" LOC = U5;
NET "vme_a_b[24]" LOC = V1;
NET "vme_a_b[23]" LOC = V2;
NET "vme_a_b[22]" LOC = W1;
NET "vme_a_b[21]" LOC = W3;
NET "vme_a_b[20]" LOC = AA4;
NET "vme_a_b[19]" LOC = AA5;
NET "vme_a_b[18]" LOC = Y1;
NET "vme_a_b[17]" LOC = Y2;
NET "vme_a_b[16]" LOC = Y3;
NET "vme_a_b[15]" LOC = Y4;
NET "vme_a_b[14]" LOC = AC1;
NET "vme_a_b[13]" LOC = AC3;
NET "vme_a_b[12]" LOC = AD1;
NET "vme_a_b[11]" LOC = AD2;
NET "vme_a_b[10]" LOC = AB3;
NET "vme_a_b[9]" LOC = AB4;
NET "vme_a_b[8]" LOC = AD3;
NET "vme_a_b[7]" LOC = AD4;
NET "vme_a_b[6]" LOC = AC4;
NET "vme_a_b[5]" LOC = AC5;
NET "vme_a_b[4]" LOC = N7;
NET "vme_a_b[3]" LOC = N8;
NET "vme_a_b[2]" LOC = AE1;
NET "vme_a_b[1]" LOC = AE3;
#----------------------------------------
# Clock and reset inputs
......@@ -124,35 +124,35 @@ NET "pll_2afpga_p_i" LOC = AA3;
# Switches and button
#----------------------------------------
NET "pushbutton_i" LOC = P24;
NET "noga0_i" LOC = AE26;
NET "noga1_i" LOC = P23;
NET "noga2_i" LOC = Y24;
NET "noga3_i" LOC = Y23;
NET "noga4_i" LOC = V23;
NET "switch0_i" LOC = W22;
NET "switch1_i" LOC = W21;
NET "noga_i[0]" LOC = AE26;
NET "noga_i[1]" LOC = P23;
NET "noga_i[2]" LOC = Y24;
NET "noga_i[3]" LOC = Y23;
NET "noga_i[4]" LOC = V23;
NET "switch_i[0]" LOC = W22;
NET "switch_i[1]" LOC = W21;
NET "usega_i" LOC = Y22;
#----------------------------------------
# Inter-FPGA lines
#----------------------------------------
NET "rsvd0_b" LOC = AG26;
NET "rsvd1_b" LOC = AH26;
NET "rsvd2_b" LOC = AG27;
NET "rsvd3_b" LOC = AH27;
NET "rsvd4_b" LOC = AK27;
NET "rsvd5_b" LOC = AG28;
NET "rsvd6_b" LOC = AJ28;
NET "rsvd7_b" LOC = AK28;
NET "rsvd_b[0]" LOC = AG26;
NET "rsvd_b[1]" LOC = AH26;
NET "rsvd_b[2]" LOC = AG27;
NET "rsvd_b[3]" LOC = AH27;
NET "rsvd_b[4]" LOC = AK27;
NET "rsvd_b[5]" LOC = AG28;
NET "rsvd_b[6]" LOC = AJ28;
NET "rsvd_b[7]" LOC = AK28;
#----------------------------------------
# PCB revision
#----------------------------------------
NET "pcbrev4_i" LOC = AF17;
NET "pcbrev3_i" LOC = AE17;
NET "pcbrev2_i" LOC = AD18;
NET "pcbrev1_i" LOC = AE20;
NET "pcbrev0_i" LOC = AD20;
NET "pcbrev_i[4]" LOC = AF17;
NET "pcbrev_i[3]" LOC = AE17;
NET "pcbrev_i[2]" LOC = AD18;
NET "pcbrev_i[1]" LOC = AE20;
NET "pcbrev_i[0]" LOC = AD20;
#----------------------------------------
# SFP slot
......@@ -167,7 +167,7 @@ NET "wr_txfault_i" LOC = AA27;
#----------------------------------------
# Clock controls
#----------------------------------------\
#----------------------------------------
NET "oe_si57x_o" LOC = Y28;
NET "si57x_scl_o" LOC = Y30;
NET "si57x_sda_b" LOC = AA29;
......@@ -196,59 +196,59 @@ NET "usb_rxf_n_i" LOC = T24;
NET "usb_siwua_i" LOC = U24;
NET "usb_txe_n_i" LOC = T25;
NET "usb_wr_n_o" LOC = T27;
NET "usb_d0_b" LOC = P27;
NET "usb_d1_b" LOC = R24;
NET "usb_d2_b" LOC = R25;
NET "usb_d3_b" LOC = R27;
NET "usb_d4_b" LOC = R28;
NET "usb_d5_b" LOC = R22;
NET "usb_d6_b" LOC = P22;
NET "usb_d7_b" LOC = R21;
NET "usb_d_b[0]" LOC = P27;
NET "usb_d_b[1]" LOC = R24;
NET "usb_d_b[2]" LOC = R25;
NET "usb_d_b[3]" LOC = R27;
NET "usb_d_b[4]" LOC = R28;
NET "usb_d_b[5]" LOC = R22;
NET "usb_d_b[6]" LOC = P22;
NET "usb_d_b[7]" LOC = R21;
NET "io7_i" LOC = U30;
#----------------------------------------
# VME P2
#----------------------------------------
NET "p2_data_p19_b" LOC = B7;
NET "p2_data_p18_b" LOC = K10;
NET "p2_data_p17_b" LOC = H17;
NET "p2_data_p16_b" LOC = F8;
NET "p2_data_p15_b" LOC = E7;
NET "p2_data_p14_b" LOC = D6;
NET "p2_data_p13_b" LOC = AE9;
NET "p2_data_p12_b" LOC = AD8;
NET "p2_data_p11_b" LOC = AG6;
NET "p2_data_p10_b" LOC = AF7;
NET "p2_data_p9_b" LOC = M10;
NET "p2_data_p8_b" LOC = L17;
NET "p2_data_p7_b" LOC = J8;
NET "p2_data_p6_b" LOC = D8;
NET "p2_data_p5_b" LOC = H7;
NET "p2_data_p4_b" LOC = F6;
NET "p2_data_p3_b" LOC = AH7;
NET "p2_data_p2_b" LOC = AB10;
NET "p2_data_p1_b" LOC = W12;
NET "p2_data_p0_b" LOC = AA11;
NET "p2_data_n19_b" LOC = A7;
NET "p2_data_n18_b" LOC = J10;
NET "p2_data_n17_b" LOC = G17;
NET "p2_data_n16_b" LOC = E8;
NET "p2_data_n15_b" LOC = D7;
NET "p2_data_n14_b" LOC = C6;
NET "p2_data_n13_b" LOC = AF9;
NET "p2_data_n12_b" LOC = AE8;
NET "p2_data_n11_b" LOC = AH6;
NET "p2_data_n10_b" LOC = AG7;
NET "p2_data_n9_b" LOC = L10;
NET "p2_data_n8_b" LOC = K17;
NET "p2_data_n7_b" LOC = H8;
NET "p2_data_n6_b" LOC = C8;
NET "p2_data_n5_b" LOC = G7;
NET "p2_data_n4_b" LOC = E6;
NET "p2_data_n3_b" LOC = AK7;
NET "p2_data_n2_b" LOC = AB9;
NET "p2_data_n1_b" LOC = Y12;
NET "p2_data_n0_b" LOC = AB11;
NET "p2_data_p_b[19]" LOC = B7;
NET "p2_data_p_b[18]" LOC = K10;
NET "p2_data_p_b[17]" LOC = H17;
NET "p2_data_p_b[16]" LOC = F8;
NET "p2_data_p_b[15]" LOC = E7;
NET "p2_data_p_b[14]" LOC = D6;
NET "p2_data_p_b[13]" LOC = AE9;
NET "p2_data_p_b[12]" LOC = AD8;
NET "p2_data_p_b[11]" LOC = AG6;
NET "p2_data_p_b[10]" LOC = AF7;
NET "p2_data_p_b[9]" LOC = M10;
NET "p2_data_p_b[8]" LOC = L17;
NET "p2_data_p_b[7]" LOC = J8;
NET "p2_data_p_b[6]" LOC = D8;
NET "p2_data_p_b[5]" LOC = H7;
NET "p2_data_p_b[4]" LOC = F6;
NET "p2_data_p_b[3]" LOC = AH7;
NET "p2_data_p_b[2]" LOC = AB10;
NET "p2_data_p_b[1]" LOC = W12;
NET "p2_data_p_b[0]" LOC = AA11;
NET "p2_data_n_b[19]" LOC = A7;
NET "p2_data_n_b[18]" LOC = J10;
NET "p2_data_n_b[17]" LOC = G17;
NET "p2_data_n_b[16]" LOC = E8;
NET "p2_data_n_b[15]" LOC = D7;
NET "p2_data_n_b[14]" LOC = C6;
NET "p2_data_n_b[13]" LOC = AF9;
NET "p2_data_n_b[12]" LOC = AE8;
NET "p2_data_n_b[11]" LOC = AH6;
NET "p2_data_n_b[10]" LOC = AG7;
NET "p2_data_n_b[9]" LOC = L10;
NET "p2_data_n_b[8]" LOC = K17;
NET "p2_data_n_b[7]" LOC = H8;
NET "p2_data_n_b[6]" LOC = C8;
NET "p2_data_n_b[5]" LOC = G7;
NET "p2_data_n_b[4]" LOC = E6;
NET "p2_data_n_b[3]" LOC = AK7;
NET "p2_data_n_b[2]" LOC = AB9;
NET "p2_data_n_b[1]" LOC = Y12;
NET "p2_data_n_b[0]" LOC = AB11;
#----------------------------------------
# DDR3 (bank 4)
......@@ -267,40 +267,40 @@ NET "ddr_cke_o" LOC = C4;
NET "ddr_ck_p_o" LOC = E3;
NET "ddr_ck_n_o" LOC = E1;
NET "ddr_cas_n_o" LOC = B1;
NET "ddr_dq15_b" LOC = M1;
NET "ddr_dq14_b" LOC = M2;
NET "ddr_dq13_b" LOC = L1;
NET "ddr_dq12_b" LOC = L3;
NET "ddr_dq11_b" LOC = L4;
NET "ddr_dq10_b" LOC = L5;
NET "ddr_dq9_b" LOC = M3;
NET "ddr_dq8_b" LOC = M4;
NET "ddr_dq7_b" LOC = H1;
NET "ddr_dq6_b" LOC = H2;
NET "ddr_dq5_b" LOC = G1;
NET "ddr_dq4_b" LOC = G3;
NET "ddr_dq3_b" LOC = J1;
NET "ddr_dq2_b" LOC = J3;
NET "ddr_dq1_b" LOC = H3;
NET "ddr_dq0_b" LOC = H4;
NET "ddr_ba2_o" LOC = F3;
NET "ddr_ba1_o" LOC = D1;
NET "ddr_ba0_o" LOC = D2;
NET "ddr_a14_o" LOC = A5;
NET "ddr_a13_o" LOC = B5;
NET "ddr_a12_o" LOC = A4;
NET "ddr_a11_o" LOC = G4;
NET "ddr_a10_o" LOC = D5;
NET "ddr_a9_o" LOC = A2;
NET "ddr_a8_o" LOC = B2;
NET "ddr_a7_o" LOC = B3;
NET "ddr_a6_o" LOC = F1;
NET "ddr_a5_o" LOC = F2;
NET "ddr_a4_o" LOC = C5;
NET "ddr_a3_o" LOC = E5;
NET "ddr_a2_o" LOC = A3;
NET "ddr_a1_o" LOC = D3;
NET "ddr_a0_o" LOC = D4;
NET "ddr_dq_b[15]" LOC = M1;
NET "ddr_dq_b[14]" LOC = M2;
NET "ddr_dq_b[13]" LOC = L1;
NET "ddr_dq_b[12]" LOC = L3;
NET "ddr_dq_b[11]" LOC = L4;
NET "ddr_dq_b[10]" LOC = L5;
NET "ddr_dq_b[9]" LOC = M3;
NET "ddr_dq_b[8]" LOC = M4;
NET "ddr_dq_b[7]" LOC = H1;
NET "ddr_dq_b[6]" LOC = H2;
NET "ddr_dq_b[5]" LOC = G1;
NET "ddr_dq_b[4]" LOC = G3;
NET "ddr_dq_b[3]" LOC = J1;
NET "ddr_dq_b[2]" LOC = J3;
NET "ddr_dq_b[1]" LOC = H3;
NET "ddr_dq_b[0]" LOC = H4;
NET "ddr_ba_o[2]" LOC = F3;
NET "ddr_ba_o[1]" LOC = D1;
NET "ddr_ba_o[0]" LOC = D2;
NET "ddr_a_o[14]" LOC = A5;
NET "ddr_a_o[13]" LOC = B5;
NET "ddr_a_o[12]" LOC = A4;
NET "ddr_a_o[11]" LOC = G4;
NET "ddr_a_o[10]" LOC = D5;
NET "ddr_a_o[9]" LOC = A2;
NET "ddr_a_o[8]" LOC = B2;
NET "ddr_a_o[7]" LOC = B3;
NET "ddr_a_o[6]" LOC = F1;
NET "ddr_a_o[5]" LOC = F2;
NET "ddr_a_o[4]" LOC = C5;
NET "ddr_a_o[3]" LOC = E5;
NET "ddr_a_o[2]" LOC = A3;
NET "ddr_a_o[1]" LOC = D3;
NET "ddr_a_o[0]" LOC = D4;
#----------------------------------------
# DDR3 (bank 5)
......@@ -318,41 +318,41 @@ NET "ddr_2_ldm_o" LOC = J28;
NET "ddr_2_cke_o" LOC = B29;
NET "ddr_2_ck_p_o" LOC = E27;
NET "ddr_2_ck_n_o" LOC = E28;
NET "ddr_2_cas_n_O" LOC = K27;
NET "ddr_2_dq15_b" LOC = M30;
NET "ddr_2_dq14_b" LOC = M28;
NET "ddr_2_dq13_b" LOC = M27;
NET "ddr_2_dq12_b" LOC = M26;
NET "ddr_2_dq11_b" LOC = L30;
NET "ddr_2_dq10_b" LOC = L29;
NET "ddr_2_dq9_b" LOC = L28;
NET "ddr_2_dq8_b" LOC = L27;
NET "ddr_2_dq7_b" LOC = F30;
NET "ddr_2_dq6_b" LOC = F28;
NET "ddr_2_dq5_b" LOC = G28;
NET "ddr_2_dq4_b" LOC = G27;
NET "ddr_2_dq3_b" LOC = G30;
NET "ddr_2_dq2_b" LOC = G29;
NET "ddr_2_dq1_b" LOC = H30;
NET "ddr_2_dq0_b" LOC = H28;
NET "ddr_2_ba2_o" LOC = D26;
NET "ddr_2_ba1_o" LOC = C27;
NET "ddr_2_ba0_o" LOC = D27;
NET "ddr_2_a14_o" LOC = A29;
NET "ddr_2_a13_o" LOC = A28;
NET "ddr_2_a12_o" LOC = B30;
NET "ddr_2_a11_o" LOC = A26;
NET "ddr_2_a10_o" LOC = F26;
NET "ddr_2_a9_o" LOC = A27;
NET "ddr_2_a8_o" LOC = B27;
NET "ddr_2_a7_o" LOC = C29;
NET "ddr_2_a6_o" LOC = H27;
NET "ddr_2_a5_o" LOC = H26;
NET "ddr_2_a4_o" LOC = F27;
NET "ddr_2_a3_o" LOC = E29;
NET "ddr_2_a2_o" LOC = C30;
NET "ddr_2_a1_o" LOC = D30;
NET "ddr_2_a0_o" LOC = D28;
NET "ddr_2_cas_n_o" LOC = K27;
NET "ddr_2_dq_b[15]" LOC = M30;
NET "ddr_2_dq_b[14]" LOC = M28;
NET "ddr_2_dq_b[13]" LOC = M27;
NET "ddr_2_dq_b[12]" LOC = M26;
NET "ddr_2_dq_b[11]" LOC = L30;
NET "ddr_2_dq_b[10]" LOC = L29;
NET "ddr_2_dq_b[9]" LOC = L28;
NET "ddr_2_dq_b[8]" LOC = L27;
NET "ddr_2_dq_b[7]" LOC = F30;
NET "ddr_2_dq_b[6]" LOC = F28;
NET "ddr_2_dq_b[5]" LOC = G28;
NET "ddr_2_dq_b[4]" LOC = G27;
NET "ddr_2_dq_b[3]" LOC = G30;
NET "ddr_2_dq_b[2]" LOC = G29;
NET "ddr_2_dq_b[1]" LOC = H30;
NET "ddr_2_dq_b[0]" LOC = H28;
NET "ddr_2_ba_o[2]" LOC = D26;
NET "ddr_2_ba_o[1]" LOC = C27;
NET "ddr_2_ba_o[0]" LOC = D27;
NET "ddr_2_a_o[14]" LOC = A29;
NET "ddr_2_a_o[13]" LOC = A28;
NET "ddr_2_a_o[12]" LOC = B30;
NET "ddr_2_a_o[11]" LOC = A26;
NET "ddr_2_a_o[10]" LOC = F26;
NET "ddr_2_a_o[9]" LOC = A27;
NET "ddr_2_a_o[8]" LOC = B27;
NET "ddr_2_a_o[7]" LOC = C29;
NET "ddr_2_a_o[6]" LOC = H27;
NET "ddr_2_a_o[5]" LOC = H26;
NET "ddr_2_a_o[4]" LOC = F27;
NET "ddr_2_a_o[3]" LOC = E29;
NET "ddr_2_a_o[2]" LOC = C30;
NET "ddr_2_a_o[1]" LOC = D30;
NET "ddr_2_a_o[0]" LOC = D28;
#----------------------------------------
# FMC slot 1
......@@ -369,74 +369,74 @@ NET "fmc1_clk1m2c_p_i" LOC = E16;
NET "fmc1_clk1m2c_n_i" LOC = D16;
NET "fmc1_clk0m2c_p_i" LOC = H15;
NET "fmc1_clk0m2c_n_I" LOC = G15;
NET "fmc1_la_p33_b" LOC = J12;
NET "fmc1_la_p32_b" LOC = H11;
NET "fmc1_la_p31_b" LOC = L11;
NET "fmc1_la_p30_b" LOC = J13;
NET "fmc1_la_p29_b" LOC = F9;
NET "fmc1_la_p28_b" LOC = L12;
NET "fmc1_la_p27_b" LOC = M13;
NET "fmc1_la_p26_b" LOC = L14;
NET "fmc1_la_p25_b" LOC = F11;
NET "fmc1_la_p24_b" LOC = G10;
NET "fmc1_la_p23_b" LOC = M15;
NET "fmc1_la_p22_b" LOC = F13;
NET "fmc1_la_p21_b" LOC = G12;
NET "fmc1_la_p20_b" LOC = F15;
NET "fmc1_la_p19_b" LOC = G14;
NET "fmc1_la_p18_b" LOC = J14;
NET "fmc1_la_p17_b" LOC = B15;
NET "fmc1_la_p16_b" LOC = F19;
NET "fmc1_la_p15_b" LOC = H16;
NET "fmc1_la_p14_b" LOC = F17;
NET "fmc1_la_p13_b" LOC = G18;
NET "fmc1_la_p12_b" LOC = F21;
NET "fmc1_la_p11_b" LOC = G20;
NET "fmc1_la_p10_b" LOC = L21;
NET "fmc1_la_p9_b" LOC = M20;
NET "fmc1_la_p8_b" LOC = F23;
NET "fmc1_la_p7_b" LOC = G22;
NET "fmc1_la_p6_b" LOC = B25;
NET "fmc1_la_p5_b" LOC = M19;
NET "fmc1_la_p4_b" LOC = D24;
NET "fmc1_la_p3_b" LOC = E25;
NET "fmc1_la_p2_b" LOC = J22;
NET "fmc1_la_p1_b" LOC = H21;
NET "fmc1_la_p0_b" LOC = C16;
NET "fmc1_la_n33_b" LOC = H12;
NET "fmc1_la_n32_b" LOC = G11;
NET "fmc1_la_n31_b" LOC = K11;
NET "fmc1_la_n30_b" LOC = H13;
NET "fmc1_la_n29_b" LOC = E9;
NET "fmc1_la_n28_b" LOC = K12;
NET "fmc1_la_n27_b" LOC = L13;
NET "fmc1_la_n26_b" LOC = K14;
NET "fmc1_la_n25_b" LOC = E11;
NET "fmc1_la_n24_b" LOC = F10;
NET "fmc1_la_n23_b" LOC = K15;
NET "fmc1_la_n22_b" LOC = E13;
NET "fmc1_la_n21_b" LOC = F12;
NET "fmc1_la_n20_b" LOC = E15;
NET "fmc1_la_n19_b" LOC = F14;
NET "fmc1_la_n18_b" LOC = H14;
NET "fmc1_la_n17_b" LOC = A15;
NET "fmc1_la_n16_b" LOC = E19;
NET "fmc1_la_n15_b" LOC = G16;
NET "fmc1_la_n14_b" LOC = E17;
NET "fmc1_la_n13_b" LOC = F18;
NET "fmc1_la_n12_b" LOC = E21;
NET "fmc1_la_n11_b" LOC = F20;
NET "fmc1_la_n10_b" LOC = K21;
NET "fmc1_la_n9_b" LOC = L20;
NET "fmc1_la_n8_b" LOC = E23;
NET "fmc1_la_n7_b" LOC = F22;
NET "fmc1_la_n6_b" LOC = A25;
NET "fmc1_la_n5_b" LOC = L19;
NET "fmc1_la_n4_b" LOC = C24;
NET "fmc1_la_n3_b" LOC = D25;
NET "fmc1_la_n2_b" LOC = H22;
NET "fmc1_la_n1_b" LOC = G21;
NET "fmc1_la_n0_b" LOC = A16;
NET "fmc1_la_p_b[33]" LOC = J12;
NET "fmc1_la_p_b[32]" LOC = H11;
NET "fmc1_la_p_b[31]" LOC = L11;
NET "fmc1_la_p_b[30]" LOC = J13;
NET "fmc1_la_p_b[29]" LOC = F9;
NET "fmc1_la_p_b[28]" LOC = L12;
NET "fmc1_la_p_b[27]" LOC = M13;
NET "fmc1_la_p_b[26]" LOC = L14;
NET "fmc1_la_p_b[25]" LOC = F11;
NET "fmc1_la_p_b[24]" LOC = G10;
NET "fmc1_la_p_b[23]" LOC = M15;
NET "fmc1_la_p_b[22]" LOC = F13;
NET "fmc1_la_p_b[21]" LOC = G12;
NET "fmc1_la_p_b[20]" LOC = F15;
NET "fmc1_la_p_b[19]" LOC = G14;
NET "fmc1_la_p_b[18]" LOC = J14;
NET "fmc1_la_p_b[17]" LOC = B15;
NET "fmc1_la_p_b[16]" LOC = F19;
NET "fmc1_la_p_b[15]" LOC = H16;
NET "fmc1_la_p_b[14]" LOC = F17;
NET "fmc1_la_p_b[13]" LOC = G18;
NET "fmc1_la_p_b[12]" LOC = F21;
NET "fmc1_la_p_b[11]" LOC = G20;
NET "fmc1_la_p_b[10]" LOC = L21;
NET "fmc1_la_p_b[9]" LOC = M20;
NET "fmc1_la_p_b[8]" LOC = F23;
NET "fmc1_la_p_b[7]" LOC = G22;
NET "fmc1_la_p_b[6]" LOC = B25;
NET "fmc1_la_p_b[5]" LOC = M19;
NET "fmc1_la_p_b[4]" LOC = D24;
NET "fmc1_la_p_b[3]" LOC = E25;
NET "fmc1_la_p_b[2]" LOC = J22;
NET "fmc1_la_p_b[1]" LOC = H21;
NET "fmc1_la_p_b[0]" LOC = C16;
NET "fmc1_la_n_b[33]" LOC = H12;
NET "fmc1_la_n_b[32]" LOC = G11;
NET "fmc1_la_n_b[31]" LOC = K11;
NET "fmc1_la_n_b[30]" LOC = H13;
NET "fmc1_la_n_b[29]" LOC = E9;
NET "fmc1_la_n_b[28]" LOC = K12;
NET "fmc1_la_n_b[27]" LOC = L13;
NET "fmc1_la_n_b[26]" LOC = K14;
NET "fmc1_la_n_b[25]" LOC = E11;
NET "fmc1_la_n_b[24]" LOC = F10;
NET "fmc1_la_n_b[23]" LOC = K15;
NET "fmc1_la_n_b[22]" LOC = E13;
NET "fmc1_la_n_b[21]" LOC = F12;
NET "fmc1_la_n_b[20]" LOC = E15;
NET "fmc1_la_n_b[19]" LOC = F14;
NET "fmc1_la_n_b[18]" LOC = H14;
NET "fmc1_la_n_b[17]" LOC = A15;
NET "fmc1_la_n_b[16]" LOC = E19;
NET "fmc1_la_n_b[15]" LOC = G16;
NET "fmc1_la_n_b[14]" LOC = E17;
NET "fmc1_la_n_b[13]" LOC = F18;
NET "fmc1_la_n_b[12]" LOC = E21;
NET "fmc1_la_n_b[11]" LOC = F20;
NET "fmc1_la_n_b[10]" LOC = K21;
NET "fmc1_la_n_b[9]" LOC = L20;
NET "fmc1_la_n_b[8]" LOC = E23;
NET "fmc1_la_n_b[7]" LOC = F22;
NET "fmc1_la_n_b[6]" LOC = A25;
NET "fmc1_la_n_b[5]" LOC = L19;
NET "fmc1_la_n_b[4]" LOC = C24;
NET "fmc1_la_n_b[3]" LOC = D25;
NET "fmc1_la_n_b[2]" LOC = H22;
NET "fmc1_la_n_b[1]" LOC = G21;
NET "fmc1_la_n_b[0]" LOC = A16;
#----------------------------------------
# FMC slot 2
......@@ -453,74 +453,74 @@ NET "fmc2_clk1m2c_p_i" LOC = AH16;
NET "fmc2_clk1m2c_n_i" LOC = AK16;
NET "fmc2_clk0m2c_p_i" LOC = AF16;
NET "fmc2_clk0m2c_n_i" LOC = AG16;
NET "fmc2_la_p33_b" LOC = AA19;
NET "fmc2_la_p32_b" LOC = W19;
NET "fmc2_la_p31_b" LOC = Y21;
NET "fmc2_la_p30_b" LOC = W20;
NET "fmc2_la_p29_b" LOC = AC24;
NET "fmc2_la_p28_b" LOC = AA22;
NET "fmc2_la_p27_b" LOC = AB20;
NET "fmc2_la_p26_b" LOC = AC19;
NET "fmc2_la_p25_b" LOC = AB17;
NET "fmc2_la_p24_b" LOC = AB21;
NET "fmc2_la_p23_b" LOC = AF25;
NET "fmc2_la_p22_b" LOC = AE24;
NET "fmc2_la_p21_b" LOC = AD22;
NET "fmc2_la_p20_b" LOC = AE19;
NET "fmc2_la_p19_b" LOC = AE23;
NET "fmc2_la_p18_b" LOC = AE21;
NET "fmc2_la_p17_b" LOC = AC16;
NET "fmc2_la_p16_b" LOC = AB14;
NET "fmc2_la_p15_b" LOC = Y17;
NET "fmc2_la_p14_b" LOC = Y15;
NET "fmc2_la_p13_b" LOC = AC15;
NET "fmc2_la_p12_b" LOC = AE15;
NET "fmc2_la_p11_b" LOC = Y16;
NET "fmc2_la_p10_b" LOC = Y14;
NET "fmc2_la_p9_b" LOC = W14;
NET "fmc2_la_p8_b" LOC = AB12;
NET "fmc2_la_p7_b" LOC = AD12;
NET "fmc2_la_p6_b" LOC = AD10;
NET "fmc2_la_p5_b" LOC = AE11;
NET "fmc2_la_p4_b" LOC = AJ15;
NET "fmc2_la_p3_b" LOC = AE13;
NET "fmc2_la_p2_b" LOC = AC11;
NET "fmc2_la_p1_b" LOC = AG8;
NET "fmc2_la_p0_b" LOC = AJ17;
NET "fmc2_la_n33_b" LOC = AB19;
NET "fmc2_la_n32_b" LOC = Y19;
NET "fmc2_la_n31_b" LOC = AA21;
NET "fmc2_la_n30_b" LOC = Y20;
NET "fmc2_la_n29_b" LOC = AD24;
NET "fmc2_la_n28_b" LOC = AC22;
NET "fmc2_la_n27_b" LOC = AC20;
NET "fmc2_la_n26_b" LOC = AD19;
NET "fmc2_la_n25_b" LOC = AD17;
NET "fmc2_la_n24_b" LOC = AC21;
NET "fmc2_la_n23_b" LOC = AG25;
NET "fmc2_la_n22_b" LOC = AF24;
NET "fmc2_la_n21_b" LOC = AE22;
NET "fmc2_la_n20_b" LOC = AF19;
NET "fmc2_la_n19_b" LOC = AF23;
NET "fmc2_la_n18_b" LOC = AF21;
NET "fmc2_la_n17_b" LOC = AD16;
NET "fmc2_la_n16_b" LOC = AC14;
NET "fmc2_la_n15_b" LOC = AA17;
NET "fmc2_la_n14_b" LOC = AA15;
NET "fmc2_la_n13_b" LOC = AD15;
NET "fmc2_la_n12_b" LOC = AF15;
NET "fmc2_la_n11_b" LOC = AB16;
NET "fmc2_la_n10_b" LOC = AA14;
NET "fmc2_la_n9_b" LOC = Y13;
NET "fmc2_la_n8_b" LOC = AC12;
NET "fmc2_la_n7_b" LOC = AE12;
NET "fmc2_la_n6_b" LOC = AE10;
NET "fmc2_la_n5_b" LOC = AF11;
NET "fmc2_la_n4_b" LOC = AK15;
NET "fmc2_la_n3_b" LOC = AF13;
NET "fmc2_la_n2_b" LOC = AD11;
NET "fmc2_la_n1_b" LOC = AH8;
NET "fmc2_la_n0_b" LOC = AK17;
NET "fmc2_la_p_b[33]" LOC = AA19;
NET "fmc2_la_p_b[32]" LOC = W19;
NET "fmc2_la_p_b[31]" LOC = Y21;
NET "fmc2_la_p_b[30]" LOC = W20;
NET "fmc2_la_p_b[29]" LOC = AC24;
NET "fmc2_la_p_b[28]" LOC = AA22;
NET "fmc2_la_p_b[27]" LOC = AB20;
NET "fmc2_la_p_b[26]" LOC = AC19;
NET "fmc2_la_p_b[25]" LOC = AB17;
NET "fmc2_la_p_b[24]" LOC = AB21;
NET "fmc2_la_p_b[23]" LOC = AF25;
NET "fmc2_la_p_b[22]" LOC = AE24;
NET "fmc2_la_p_b[21]" LOC = AD22;
NET "fmc2_la_p_b[20]" LOC = AE19;
NET "fmc2_la_p_b[19]" LOC = AE23;
NET "fmc2_la_p_b[18]" LOC = AE21;
NET "fmc2_la_p_b[17]" LOC = AC16;
NET "fmc2_la_p_b[16]" LOC = AB14;
NET "fmc2_la_p_b[15]" LOC = Y17;
NET "fmc2_la_p_b[14]" LOC = Y15;
NET "fmc2_la_p_b[13]" LOC = AC15;
NET "fmc2_la_p_b[12]" LOC = AE15;
NET "fmc2_la_p_b[11]" LOC = Y16;
NET "fmc2_la_p_b[10]" LOC = Y14;
NET "fmc2_la_p_b[9]" LOC = W14;
NET "fmc2_la_p_b[8]" LOC = AB12;
NET "fmc2_la_p_b[7]" LOC = AD12;
NET "fmc2_la_p_b[6]" LOC = AD10;
NET "fmc2_la_p_b[5]" LOC = AE11;
NET "fmc2_la_p_b[4]" LOC = AJ15;
NET "fmc2_la_p_b[3]" LOC = AE13;
NET "fmc2_la_p_b[2]" LOC = AC11;
NET "fmc2_la_p_b[1]" LOC = AG8;
NET "fmc2_la_p_b[0]" LOC = AJ17;
NET "fmc2_la_n_b[33]" LOC = AB19;
NET "fmc2_la_n_b[32]" LOC = Y19;
NET "fmc2_la_n_b[31]" LOC = AA21;
NET "fmc2_la_n_b[30]" LOC = Y20;
NET "fmc2_la_n_b[29]" LOC = AD24;
NET "fmc2_la_n_b[28]" LOC = AC22;
NET "fmc2_la_n_b[27]" LOC = AC20;
NET "fmc2_la_n_b[26]" LOC = AD19;
NET "fmc2_la_n_b[25]" LOC = AD17;
NET "fmc2_la_n_b[24]" LOC = AC21;
NET "fmc2_la_n_b[23]" LOC = AG25;
NET "fmc2_la_n_b[22]" LOC = AF24;
NET "fmc2_la_n_b[21]" LOC = AE22;
NET "fmc2_la_n_b[20]" LOC = AF19;
NET "fmc2_la_n_b[19]" LOC = AF23;
NET "fmc2_la_n_b[18]" LOC = AF21;
NET "fmc2_la_n_b[17]" LOC = AD16;
NET "fmc2_la_n_b[16]" LOC = AC14;
NET "fmc2_la_n_b[15]" LOC = AA17;
NET "fmc2_la_n_b[14]" LOC = AA15;
NET "fmc2_la_n_b[13]" LOC = AD15;
NET "fmc2_la_n_b[12]" LOC = AF15;
NET "fmc2_la_n_b[11]" LOC = AB16;
NET "fmc2_la_n_b[10]" LOC = AA14;
NET "fmc2_la_n_b[9]" LOC = Y13;
NET "fmc2_la_n_b[8]" LOC = AC12;
NET "fmc2_la_n_b[7]" LOC = AE12;
NET "fmc2_la_n_b[6]" LOC = AE10;
NET "fmc2_la_n_b[5]" LOC = AF11;
NET "fmc2_la_n_b[4]" LOC = AK15;
NET "fmc2_la_n_b[3]" LOC = AF13;
NET "fmc2_la_n_b[2]" LOC = AD11;
NET "fmc2_la_n_b[1]" LOC = AH8;
NET "fmc2_la_n_b[0]" LOC = AK17;
#----------------------------------------
# I2C EEPROM
......@@ -531,28 +531,28 @@ NET "sda_afpga_b" LOC = AA30;
#----------------------------------------
# Front panel IO and LEDs
#----------------------------------------
NET "fp_gpio1_b" LOC = R30;
NET "fp_gpio2_b" LOC = T28;
NET "fp_gpio3_b" LOC = U29;
NET "fp_gpio4_b" LOC = V27;
NET "fp_gpio_b[1]" LOC = R30;
NET "fp_gpio_b[2]" LOC = T28;
NET "fp_gpio_b[3]" LOC = U29;
NET "fp_gpio_b[4]" LOC = V27;
NET "fpgpio1_a2b_o" LOC = R29;
NET "fpgpio2_a2b_o" LOC = T30;
NET "fpgpio34_a2b_o" LOC = V28;
NET "term_en1_o" LOC = AB1;
NET "term_en2_o" LOC = W5;
NET "term_en3_o" LOC = W4;
NET "term_en4_o" LOC = V4;
NET "term_en_o[1]" LOC = AB1;
NET "term_en_o[2]" LOC = W5;
NET "term_en_o[3]" LOC = W4;
NET "term_en_o[4]" LOC = V4;
NET "fp_ledn0_o" LOC = AD27;
NET "fp_ledn1_o" LOC = AD26;
NET "fp_ledn2_o" LOC = AC28;
NET "fp_ledn3_o" LOC = AC27;
NET "fp_ledn4_o" LOC = AE27;
NET "fp_ledn5_o" LOC = AE30;
NET "fp_ledn6_o" LOC = AF28;
NET "fp_ledn7_o" LOC = AE28;
NET "fp_ledn_o[0]" LOC = AD27;
NET "fp_ledn_o[1]" LOC = AD26;
NET "fp_ledn_o[2]" LOC = AC28;
NET "fp_ledn_o[3]" LOC = AC27;
NET "fp_ledn_o[4]" LOC = AE27;
NET "fp_ledn_o[5]" LOC = AE30;
NET "fp_ledn_o[6]" LOC = AF28;
NET "fp_ledn_o[7]" LOC = AE28;
#----------------------------------------
# 1-wire thermoeter + unique ID
......@@ -562,10 +562,10 @@ NET "tempid_dq_b" LOC = AC30;
#----------------------------------------
# Debug LEDs
#----------------------------------------
NET "dbg_led4_n_o" LOC = U7;
NET "dbg_led3_n_o" LOC = AG1;
NET "dbg_led2_n_o" LOC = AF1;
NET "dbg_led1_n_o" LOC = R6;
NET "dbg_led_n_o[4]" LOC = U7;
NET "dbg_led_n_o[3]" LOC = AG1;
NET "dbg_led_n_o[2]" LOC = AF1;
NET "dbg_led_n_o[1]" LOC = R6;
#----------------------------------------
# Boot interface
......@@ -616,87 +616,87 @@ NET "vme_berr_o" IOSTANDARD = "LVCMOS33";
NET "vme_as_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_a_oe_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_a_dir_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq7_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq6_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq5_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq4_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq3_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq2_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq1_o" IOSTANDARD = "LVCMOS33";
NET "vme_ga4_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga3_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga2_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga1_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga0_i" IOSTANDARD = "LVCMOS33";
NET "vme_d31_b" IOSTANDARD = "LVCMOS33";
NET "vme_d30_b" IOSTANDARD = "LVCMOS33";
NET "vme_d29_b" IOSTANDARD = "LVCMOS33";
NET "vme_d28_b" IOSTANDARD = "LVCMOS33";
NET "vme_d27_b" IOSTANDARD = "LVCMOS33";
NET "vme_d26_b" IOSTANDARD = "LVCMOS33";
NET "vme_d25_b" IOSTANDARD = "LVCMOS33";
NET "vme_d24_b" IOSTANDARD = "LVCMOS33";
NET "vme_d23_b" IOSTANDARD = "LVCMOS33";
NET "vme_d22_b" IOSTANDARD = "LVCMOS33";
NET "vme_d21_b" IOSTANDARD = "LVCMOS33";
NET "vme_d20_b" IOSTANDARD = "LVCMOS33";
NET "vme_d19_b" IOSTANDARD = "LVCMOS33";
NET "vme_d18_b" IOSTANDARD = "LVCMOS33";
NET "vme_d17_b" IOSTANDARD = "LVCMOS33";
NET "vme_d16_b" IOSTANDARD = "LVCMOS33";
NET "vme_d15_b" IOSTANDARD = "LVCMOS33";
NET "vme_d14_b" IOSTANDARD = "LVCMOS33";
NET "vme_d13_b" IOSTANDARD = "LVCMOS33";
NET "vme_d12_b" IOSTANDARD = "LVCMOS33";
NET "vme_d11_b" IOSTANDARD = "LVCMOS33";
NET "vme_d10_b" IOSTANDARD = "LVCMOS33";
NET "vme_d9_b" IOSTANDARD = "LVCMOS33";
NET "vme_d8_b" IOSTANDARD = "LVCMOS33";
NET "vme_d7_b" IOSTANDARD = "LVCMOS33";
NET "vme_d6_b" IOSTANDARD = "LVCMOS33";
NET "vme_d5_b" IOSTANDARD = "LVCMOS33";
NET "vme_d4_b" IOSTANDARD = "LVCMOS33";
NET "vme_d3_b" IOSTANDARD = "LVCMOS33";
NET "vme_d2_b" IOSTANDARD = "LVCMOS33";
NET "vme_d1_b" IOSTANDARD = "LVCMOS33";
NET "vme_d0_b" IOSTANDARD = "LVCMOS33";
NET "vme_am5_i" IOSTANDARD = "LVCMOS33";
NET "vme_am4_i" IOSTANDARD = "LVCMOS33";
NET "vme_am3_i" IOSTANDARD = "LVCMOS33";
NET "vme_am2_i" IOSTANDARD = "LVCMOS33";
NET "vme_am1_i" IOSTANDARD = "LVCMOS33";
NET "vme_am0_i" IOSTANDARD = "LVCMOS33";
NET "vme_a31_b" IOSTANDARD = "LVCMOS33";
NET "vme_a30_b" IOSTANDARD = "LVCMOS33";
NET "vme_a29_b" IOSTANDARD = "LVCMOS33";
NET "vme_a28_b" IOSTANDARD = "LVCMOS33";
NET "vme_a27_b" IOSTANDARD = "LVCMOS33";
NET "vme_a26_b" IOSTANDARD = "LVCMOS33";
NET "vme_a25_b" IOSTANDARD = "LVCMOS33";
NET "vme_a24_b" IOSTANDARD = "LVCMOS33";
NET "vme_a23_b" IOSTANDARD = "LVCMOS33";
NET "vme_a22_b" IOSTANDARD = "LVCMOS33";
NET "vme_a21_b" IOSTANDARD = "LVCMOS33";
NET "vme_a20_b" IOSTANDARD = "LVCMOS33";
NET "vme_a19_b" IOSTANDARD = "LVCMOS33";
NET "vme_a18_b" IOSTANDARD = "LVCMOS33";
NET "vme_a17_b" IOSTANDARD = "LVCMOS33";
NET "vme_a16_b" IOSTANDARD = "LVCMOS33";
NET "vme_a15_b" IOSTANDARD = "LVCMOS33";
NET "vme_a14_b" IOSTANDARD = "LVCMOS33";
NET "vme_a13_b" IOSTANDARD = "LVCMOS33";
NET "vme_a12_b" IOSTANDARD = "LVCMOS33";
NET "vme_a11_b" IOSTANDARD = "LVCMOS33";
NET "vme_a10_b" IOSTANDARD = "LVCMOS33";
NET "vme_a9_b" IOSTANDARD = "LVCMOS33";
NET "vme_a8_b" IOSTANDARD = "LVCMOS33";
NET "vme_a7_b" IOSTANDARD = "LVCMOS33";
NET "vme_a6_b" IOSTANDARD = "LVCMOS33";
NET "vme_a5_b" IOSTANDARD = "LVCMOS33";
NET "vme_a4_b" IOSTANDARD = "LVCMOS33";
NET "vme_a3_b" IOSTANDARD = "LVCMOS33";
NET "vme_a2_b" IOSTANDARD = "LVCMOS33";
NET "vme_a1_b" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[7]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[6]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[5]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[4]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[3]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[2]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[1]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[4]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[3]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[2]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[1]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[0]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[31]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[30]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[29]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[28]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[27]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[26]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[25]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[24]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[23]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[22]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[21]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[20]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[19]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[18]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[17]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[16]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[15]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[14]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[13]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[12]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[11]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[10]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[9]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[8]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[7]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[6]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[5]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[4]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[3]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[2]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[1]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[0]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[5]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[4]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[3]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[2]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[1]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[0]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[31]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[30]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[29]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[28]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[27]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[26]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[25]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[24]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[23]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[22]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[21]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[20]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[19]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[18]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[17]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[16]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[15]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[14]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[13]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[12]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[11]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[10]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[9]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[8]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[7]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[6]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[5]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[4]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[3]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[2]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[1]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Clock and reset inputs
......@@ -715,35 +715,35 @@ NET "pll_2afpga_p_i" IOSTANDARD = "LVCMOS33";
# Switches and button
#----------------------------------------
NET "pushbutton_i" IOSTANDARD = "LVCMOS33";
NET "noga0_i" IOSTANDARD = "LVCMOS33";
NET "noga1_i" IOSTANDARD = "LVCMOS33";
NET "noga2_i" IOSTANDARD = "LVCMOS33";
NET "noga3_i" IOSTANDARD = "LVCMOS33";
NET "noga4_i" IOSTANDARD = "LVCMOS33";
NET "switch0_i" IOSTANDARD = "LVCMOS33";
NET "switch1_i" IOSTANDARD = "LVCMOS33";
NET "noga_i[0]" IOSTANDARD = "LVCMOS33";
NET "noga_i[1]" IOSTANDARD = "LVCMOS33";
NET "noga_i[2]" IOSTANDARD = "LVCMOS33";
NET "noga_i[3]" IOSTANDARD = "LVCMOS33";
NET "noga_i[4]" IOSTANDARD = "LVCMOS33";
NET "switch_i[0]" IOSTANDARD = "LVCMOS33";
NET "switch_i[1]" IOSTANDARD = "LVCMOS33";
NET "usega_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Inter-FPGA lines
#----------------------------------------
NET "rsvd0_b" IOSTANDARD = "LVCMOS33";
NET "rsvd1_b" IOSTANDARD = "LVCMOS33";
NET "rsvd2_b" IOSTANDARD = "LVCMOS33";
NET "rsvd3_b" IOSTANDARD = "LVCMOS33";
NET "rsvd4_b" IOSTANDARD = "LVCMOS33";
NET "rsvd5_b" IOSTANDARD = "LVCMOS33";
NET "rsvd6_b" IOSTANDARD = "LVCMOS33";
NET "rsvd7_b" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[0]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[1]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[2]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[3]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[4]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[5]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[6]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[7]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# PCB revision
#----------------------------------------
NET "pcbrev4_i" IOSTANDARD = "LVCMOS25";
NET "pcbrev3_i" IOSTANDARD = "LVCMOS25";
NET "pcbrev2_i" IOSTANDARD = "LVCMOS25";
NET "pcbrev1_i" IOSTANDARD = "LVCMOS25";
NET "pcbrev0_i" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[4]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[3]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[2]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[1]" IOSTANDARD = "LVCMOS25";
NET "pcbrev_i[0]" IOSTANDARD = "LVCMOS25";
#----------------------------------------
# SFP slot
......@@ -758,7 +758,7 @@ NET "wr_txfault_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Clock controls
#----------------------------------------\
#----------------------------------------
NET "oe_si57x_o" IOSTANDARD = "LVCMOS33";
NET "si57x_scl_o" IOSTANDARD = "LVCMOS33";
NET "si57x_sda_b" IOSTANDARD = "LVCMOS33";
......@@ -787,59 +787,59 @@ NET "usb_rxf_n_i" IOSTANDARD = "LVCMOS33";
NET "usb_siwua_i" IOSTANDARD = "LVCMOS33";
NET "usb_txe_n_i" IOSTANDARD = "LVCMOS33";
NET "usb_wr_n_o" IOSTANDARD = "LVCMOS33";
NET "usb_d0_b" IOSTANDARD = "LVCMOS33";
NET "usb_d1_b" IOSTANDARD = "LVCMOS33";
NET "usb_d2_b" IOSTANDARD = "LVCMOS33";
NET "usb_d3_b" IOSTANDARD = "LVCMOS33";
NET "usb_d4_b" IOSTANDARD = "LVCMOS33";
NET "usb_d5_b" IOSTANDARD = "LVCMOS33";
NET "usb_d6_b" IOSTANDARD = "LVCMOS33";
NET "usb_d7_b" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[0]" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[1]" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[2]" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[3]" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[4]" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[5]" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[6]" IOSTANDARD = "LVCMOS33";
NET "usb_d_b[7]" IOSTANDARD = "LVCMOS33";
NET "io7_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# VME P2
#----------------------------------------
NET "p2_data_p19_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p18_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p17_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p16_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p15_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p14_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p13_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p12_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p11_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p10_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p9_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p8_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p7_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p6_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p5_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p4_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p3_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p2_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p1_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p0_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n19_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n18_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n17_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n16_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n15_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n14_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n13_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n12_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n11_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n10_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n9_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n8_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n7_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n6_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n5_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n4_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n3_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n2_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n1_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_n0_b" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[19]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[18]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[17]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[16]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[15]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[14]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[13]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[12]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[11]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[10]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[9]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[8]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[7]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[6]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[5]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[4]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[3]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[2]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[1]" IOSTANDARD = "LVCMOS25";
NET "p2_data_p_b[0]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[19]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[18]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[17]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[16]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[15]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[14]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[13]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[12]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[11]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[10]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[9]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[8]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[7]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[6]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[5]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[4]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[3]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[2]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[1]" IOSTANDARD = "LVCMOS25";
NET "p2_data_n_b[0]" IOSTANDARD = "LVCMOS25";
#----------------------------------------
# DDR3 (bank 4)
......@@ -858,40 +858,40 @@ NET "ddr_cke_o" IOSTANDARD = "SSTL15_II";
NET "ddr_ck_p_o" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_ck_n_o" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_cas_n_o" IOSTANDARD = "SSTL15_II";
NET "ddr_dq15_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq14_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq13_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq12_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq11_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq10_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq9_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq8_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq7_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq6_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq5_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq4_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq3_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq2_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq1_b" IOSTANDARD = "SSTL15_II";
NET "ddr_dq0_b" IOSTANDARD = "SSTL15_II";
NET "ddr_ba2_o" IOSTANDARD = "SSTL15_II";
NET "ddr_ba1_o" IOSTANDARD = "SSTL15_II";
NET "ddr_ba0_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a14_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a13_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a12_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a11_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a10_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a9_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a8_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a7_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a6_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a5_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a4_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a3_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a2_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a1_o" IOSTANDARD = "SSTL15_II";
NET "ddr_a0_o" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[15]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[14]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[13]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[12]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[11]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[10]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[9]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[8]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[7]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[6]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[5]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[4]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[3]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[2]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[1]" IOSTANDARD = "SSTL15_II";
NET "ddr_dq_b[0]" IOSTANDARD = "SSTL15_II";
NET "ddr_ba_o[2]" IOSTANDARD = "SSTL15_II";
NET "ddr_ba_o[1]" IOSTANDARD = "SSTL15_II";
NET "ddr_ba_o[0]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[14]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[13]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[12]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[11]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[10]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[9]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[8]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[7]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[6]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[5]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[4]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[3]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[2]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[1]" IOSTANDARD = "SSTL15_II";
NET "ddr_a_o[0]" IOSTANDARD = "SSTL15_II";
#----------------------------------------
# DDR3 (bank 5)
......@@ -909,41 +909,41 @@ NET "ddr_2_ldm_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_cke_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_ck_p_o" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_2_ck_n_o" IOSTANDARD = "DIFF_SSTL15_II";
NET "ddr_2_cas_n_O" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq15_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq14_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq13_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq12_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq11_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq10_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq9_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq8_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq7_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq6_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq5_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq4_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq3_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq2_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq1_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq0_b" IOSTANDARD = "SSTL15_II";
NET "ddr_2_ba2_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_ba1_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_ba0_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a14_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a13_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a12_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a11_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a10_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a9_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a8_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a7_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a6_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a5_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a4_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a3_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a2_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a1_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a0_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_cas_n_o" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[15]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[14]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[13]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[12]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[11]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[10]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[9]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[8]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[7]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[6]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[5]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[4]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[3]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[2]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[1]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_dq_b[0]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_ba_o[2]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_ba_o[1]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_ba_o[0]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[14]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[13]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[12]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[11]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[10]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[9]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[8]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[7]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[6]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[5]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[4]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[3]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[2]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[1]" IOSTANDARD = "SSTL15_II";
NET "ddr_2_a_o[0]" IOSTANDARD = "SSTL15_II";
#----------------------------------------
# FMC slot 1
......@@ -960,74 +960,74 @@ NET "fmc1_clk1m2c_p_i" IOSTANDARD = "LVCMOS25";
NET "fmc1_clk1m2c_n_i" IOSTANDARD = "LVCMOS25";
NET "fmc1_clk0m2c_p_i" IOSTANDARD = "LVCMOS25";
NET "fmc1_clk0m2c_n_I" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p33_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p32_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p31_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p30_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p29_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p28_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p27_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p26_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p25_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p24_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p23_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p22_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p21_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p20_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p19_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p18_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p17_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p16_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p15_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p14_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p13_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p12_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p11_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p10_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p9_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p8_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p7_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p6_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p5_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p4_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p3_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p2_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p1_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p0_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n33_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n32_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n31_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n30_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n29_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n28_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n27_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n26_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n25_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n24_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n23_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n22_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n21_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n20_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n19_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n18_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n17_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n16_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n15_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n14_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n13_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n12_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n11_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n10_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n9_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n8_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n7_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n6_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n5_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n4_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n3_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n2_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n1_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n0_b" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[33]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[32]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[31]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[30]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[29]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[28]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[27]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[26]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[25]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[24]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[23]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[22]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[21]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[20]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[19]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[18]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[17]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[16]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[15]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[14]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[13]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[12]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[11]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[10]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[9]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[8]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[7]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[6]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[5]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[4]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[3]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[2]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[1]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_p_b[0]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[33]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[32]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[31]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[30]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[29]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[28]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[27]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[26]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[25]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[24]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[23]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[22]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[21]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[20]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[19]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[18]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[17]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[16]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[15]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[14]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[13]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[12]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[11]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[10]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[9]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[8]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[7]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[6]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[5]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[4]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[3]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[2]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[1]" IOSTANDARD = "LVCMOS25";
NET "fmc1_la_n_b[0]" IOSTANDARD = "LVCMOS25";
#----------------------------------------
# FMC slot 2
......@@ -1044,74 +1044,74 @@ NET "fmc2_clk1m2c_p_i" IOSTANDARD = "LVCMOS25";
NET "fmc2_clk1m2c_n_i" IOSTANDARD = "LVCMOS25";
NET "fmc2_clk0m2c_p_i" IOSTANDARD = "LVCMOS25";
NET "fmc2_clk0m2c_n_i" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p33_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p32_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p31_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p30_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p29_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p28_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p27_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p26_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p25_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p24_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p23_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p22_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p21_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p20_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p19_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p18_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p17_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p16_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p15_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p14_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p13_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p12_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p11_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p10_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p9_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p8_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p7_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p6_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p5_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p4_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p3_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p2_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p1_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p0_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n33_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n32_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n31_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n30_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n29_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n28_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n27_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n26_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n25_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n24_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n23_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n22_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n21_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n20_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n19_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n18_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n17_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n16_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n15_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n14_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n13_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n12_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n11_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n10_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n9_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n8_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n7_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n6_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n5_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n4_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n3_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n2_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n1_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n0_b" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[33]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[32]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[31]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[30]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[29]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[28]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[27]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[26]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[25]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[24]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[23]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[22]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[21]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[20]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[19]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[18]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[17]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[16]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[15]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[14]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[13]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[12]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[11]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[10]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[9]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[8]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[7]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[6]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[5]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[4]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[3]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[2]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[1]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_p_b[0]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[33]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[32]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[31]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[30]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[29]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[28]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[27]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[26]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[25]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[24]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[23]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[22]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[21]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[20]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[19]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[18]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[17]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[16]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[15]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[14]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[13]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[12]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[11]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[10]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[9]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[8]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[7]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[6]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[5]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[4]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[3]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[2]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[1]" IOSTANDARD = "LVCMOS25";
NET "fmc2_la_n_b[0]" IOSTANDARD = "LVCMOS25";
#----------------------------------------
# I2C EEPROM
......@@ -1122,28 +1122,28 @@ NET "sda_afpga_b" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Front panel IO and LEDs
#----------------------------------------
NET "fp_gpio1_b" IOSTANDARD = "LVCMOS33";
NET "fp_gpio2_b" IOSTANDARD = "LVCMOS33";
NET "fp_gpio3_b" IOSTANDARD = "LVCMOS33";
NET "fp_gpio4_b" IOSTANDARD = "LVCMOS33";
NET "fp_gpio_b[1]" IOSTANDARD = "LVCMOS33";
NET "fp_gpio_b[2]" IOSTANDARD = "LVCMOS33";
NET "fp_gpio_b[3]" IOSTANDARD = "LVCMOS33";
NET "fp_gpio_b[4]" IOSTANDARD = "LVCMOS33";
NET "fpgpio1_a2b_o" IOSTANDARD = "LVCMOS33";
NET "fpgpio2_a2b_o" IOSTANDARD = "LVCMOS33";
NET "fpgpio34_a2b_o" IOSTANDARD = "LVCMOS33";
NET "term_en1_o" IOSTANDARD = "LVCMOS33";
NET "term_en2_o" IOSTANDARD = "LVCMOS33";
NET "term_en3_o" IOSTANDARD = "LVCMOS33";
NET "term_en4_o" IOSTANDARD = "LVCMOS33";
NET "term_en_o[1]" IOSTANDARD = "LVCMOS33";
NET "term_en_o[2]" IOSTANDARD = "LVCMOS33";
NET "term_en_o[3]" IOSTANDARD = "LVCMOS33";
NET "term_en_o[4]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn0_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn1_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn2_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn3_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn4_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn5_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn6_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn7_o" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[0]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[1]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[2]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[3]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[4]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[5]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[6]" IOSTANDARD = "LVCMOS33";
NET "fp_ledn_o[7]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# 1-wire thermoeter + unique ID
......@@ -1153,10 +1153,10 @@ NET "tempid_dq_b" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Debug LEDs
#----------------------------------------
NET "dbg_led4_n_o" IOSTANDARD = "LVCMOS33";
NET "dbg_led3_n_o" IOSTANDARD = "LVCMOS33";
NET "dbg_led2_n_o" IOSTANDARD = "LVCMOS33";
NET "dbg_led1_n_o" IOSTANDARD = "LVCMOS33";
NET "dbg_led_n_o[4]" IOSTANDARD = "LVCMOS33";
NET "dbg_led_n_o[3]" IOSTANDARD = "LVCMOS33";
NET "dbg_led_n_o[2]" IOSTANDARD = "LVCMOS33";
NET "dbg_led_n_o[1]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Boot interface
......
hdl/afpga/svec_v0_afpga_top.vhd 0 → 100644
View file @ 76e01d95
--------------------------------------------------------------------------------
-- CERN (BE-CO-HT)
-- Top level entity for Simple VME FMC Carrier (SVEC) Application FPGA
-- http://www.ohwr.org/projects/svec
--------------------------------------------------------------------------------
--
-- unit name: svec_v0_afpga_top
--
-- author: Matthieu Cattin (matthieu.cattin@cern.ch)
--
-- date: 14-06-2012
--
-- version: 1.0
--
-- description: Generic top level entity for the application FPGA of the
-- Simple VME FMC Carrier (SVEC).
--
-- dependencies:
--
--------------------------------------------------------------------------------
-- GNU LESSER GENERAL PUBLIC LICENSE
--------------------------------------------------------------------------------
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
-- option) any later version. This source is distributed in the hope that it
-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
--------------------------------------------------------------------------------
-- last changes: see svn log.
--------------------------------------------------------------------------------
-- TODO: -
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.NUMERIC_STD.all;
--library UNISIM;
--use UNISIM.vcomponents.all;
library work;
entity svec_v0_afpga_top is
generic(
g_GENERIC : string := "FALSE");
port
(
------------------------------------------
-- VME interface
------------------------------------------
vme_write_n_i : in std_logic;
vme_sysreset_n_i : in std_logic;
vme_sysclk_i : in std_logic;
vme_retry_oe_o : out std_logic;
vme_retry_n_o : out std_logic;
vme_lword_n_b : inout std_logic;
vme_iackout_n_o : out std_logic;
vme_iackin_n_i : in std_logic;
vme_iack_n_o : out std_logic;
vme_gap_i : in std_logic;
vme_dtack_oe_o : out std_logic;
vme_dtack_n_o : out std_logic;
vme_ds2_n_i : in std_logic;
vme_ds1_n_i : in std_logic;
vme_d_oe_n_o : out std_logic;
vme_d_dir_o : out std_logic;
vme_berr_o : out std_logic;
vme_as_n_i : in std_logic;
vme_a_oe_n_o : out std_logic;
vme_a_dir_o : out std_logic;
vme_irq_o : out std_logic_vector(7 downto 1);
vme_ga_i : in std_logic_vector(4 downto 0);
vme_d_b : inout std_logic_vector(31 downto 0);
vme_am_i : in std_logic_vector(5 downto 0);
vme_a_b : inout std_logic_vector(31 downto 1);
------------------------------------------
-- Clock and reset inputs
------------------------------------------
rst_n_i : in std_logic;
clk20_vcxo_i : in std_logic;
fpga_clk_n_i : in std_logic;
fpga_clk_p_i : in std_logic;
si57x_clk_n_i : in std_logic;
si57x_clk_p_i : in std_logic;
pll_2afpga_n_i : in std_logic;
pll_2afpga_p_i : in std_logic;
------------------------------------------
-- Switches and button
------------------------------------------
pushbutton_i : in std_logic;
noga_i : in std_logic_vector(4 downto 0);
switch_i : in std_logic_vector(1 downto 0);
usega_i : in std_logic;
------------------------------------------
-- Inter-FPGA lines
------------------------------------------
rsvd_b : inout std_logic_vector(7 downto 0);
------------------------------------------
-- PCB revision
------------------------------------------
pcbrev_i : in std_logic_vector(4 downto 0);
------------------------------------------
-- SFP slot
------------------------------------------
wr_los_i : in std_logic;
wr_moddef0_i : in std_logic;
wr_moddef1_o : out std_logic;
wr_moddef2_b : inout std_logic;
wr_rateselect_o : out std_logic;
wr_txdisable_o : out std_logic;
wr_txfault_i : in std_logic;
------------------------------------------
-- Clock controls
------------------------------------------
oe_si57x_o : out std_logic;
si57x_scl_o : out std_logic;
si57x_sda_b : inout std_logic;
si57x_tune_o : out std_logic; -- (optional)
pll20dac_din_o : out std_logic;
pll20dac_sclk_o : out std_logic;
pll20dac_sync_n_o : out std_logic;
pll25dac_din_o : out std_logic;
pll25dac_sclk_o : out std_logic;
pll25dac_sync_n_o : out std_logic;
------------------------------------------
-- UART
------------------------------------------
uart_rxd_o : out std_logic;
uart_txd_i : in std_logic;
------------------------------------------
-- USB (optional)
------------------------------------------
usb_clkout_i : in std_logic;
usb_oe_n_o : out std_logic;
usb_rd_n_o : out std_logic;
usb_rxf_n_i : in std_logic;
usb_siwua_i : in std_logic;
usb_txe_n_i : in std_logic;
usb_wr_n_o : out std_logic;
usb_d_b : inout std_logic_vector(7 downto 0);
io7_i : in std_logic;
------------------------------------------
-- VME P2
------------------------------------------
p2_data_p_b : inout std_logic_vector(19 downto 0);
p2_data_n_b : inout std_logic_vector(19 downto 0);
------------------------------------------
-- DDR3 (bank 4)
------------------------------------------
ddr_we_n_o : out std_logic;
ddr_udqs_p_b : inout std_logic;
ddr_udqs_n_b : inout std_logic;
ddr_udm_o : out std_logic;
ddr_reset_n_o : out std_logic;
ddr_ras_n_o : out std_logic;
ddr_odt_o : out std_logic;
ddr_ldqs_p_b : inout std_logic;
ddr_ldqs_n_b : inout std_logic;
ddr_ldm_o : out std_logic;
ddr_cke_o : out std_logic;
ddr_ck_p_o : out std_logic;
ddr_ck_n_o : out std_logic;
ddr_cas_n_o : out std_logic;
ddr_dq_b : inout std_logic_vector(15 downto 0);
ddr_ba_o : out std_logic_vector(2 downto 0);
ddr_a_o : out std_logic_vector(14 downto 0);
------------------------------------------
-- DDR3 (bank 5)
------------------------------------------
ddr_2_we_n_o : out std_logic;
ddr_2_udqs_p_b : inout std_logic;
ddr_2_udqs_n_b : inout std_logic;
ddr_2_udm_o : out std_logic;
ddr_2_reset_n_o : out std_logic;
ddr_2_ras_n_o : out std_logic;
ddr_2_odt_o : out std_logic;
ddr_2_ldqs_p_b : inout std_logic;
ddr_2_ldqs_n_b : inout std_logic;
ddr_2_ldm_o : out std_logic;
ddr_2_cke_o : out std_logic;
ddr_2_ck_p_o : out std_logic;
ddr_2_ck_n_o : out std_logic;
ddr_2_cas_n_o : out std_logic;
ddr_2_dq_b : inout std_logic_vector(15 downto 0);
ddr_2_ba_o : out std_logic_vector(2 downto 0);
ddr_2_a_o : out std_logic_vector(14 downto 0);
------------------------------------------
-- FMC slot 1
------------------------------------------
fmc1_pg_c2m_o : out std_logic;
fmc1_prsntm2c_n_i : in std_logic;
fmc1_scl_o : out std_logic;
fmc1_sda_b : inout std_logic;
fmc1_tck_o : out std_logic;
fmc1_tdi_i : in std_logic;
fmc1_tdo_o : out std_logic;
fmc1_tms_o : out std_logic;
fmc1_clk1m2c_p_i : in std_logic;
fmc1_clk1m2c_n_i : in std_logic;
fmc1_clk0m2c_p_i : in std_logic;
fmc1_clk0m2c_n_I : in std_logic;
fmc1_la_p_b : inout std_logic_vector(33 downto 0);
fmc1_la_n_b : inout std_logic_vector(33 downto 0);
------------------------------------------
-- FMC slot 2
------------------------------------------
fmc2_pg_c2m_o : out std_logic;
fmc2_prsntm2c_n_i : in std_logic;
fmc2_scl_o : out std_logic;
fmc2_sda_b : inout std_logic;
fmc2_tck_o : out std_logic;
fmc2_tdi_i : in std_logic;
fmc2_tdo_o : out std_logic;
fmc2_tms_o : out std_logic;
fmc2_clk1m2c_p_i : in std_logic;
fmc2_clk1m2c_n_i : in std_logic;
fmc2_clk0m2c_p_i : in std_logic;
fmc2_clk0m2c_n_i : in std_logic;
fmc2_la_p_b : inout std_logic_vector(33 downto 0);
fmc2_la_n_b : inout std_logic_vector(33 downto 0);
------------------------------------------
-- I2C EEPROM
------------------------------------------
scl_afpga_o : out std_logic;
sda_afpga_b : inout std_logic;
------------------------------------------
-- Front panel IO and LEDs
------------------------------------------
fp_gpio_b : inout std_logic_vector(4 downto 1);
fpgpio1_a2b_o : out std_logic;
fpgpio2_a2b_o : out std_logic;
fpgpio34_a2b_o : out std_logic;
term_en_o : out std_logic_vector(4 downto 1);
fp_ledn_o : out std_logic_vector(7 downto 0);
------------------------------------------
-- 1-wire thermoeter + unique ID
------------------------------------------
tempid_dq_b : inout std_logic;
------------------------------------------
-- Debug LEDs
------------------------------------------
dbg_led_n_o : out std_logic_vector(4 downto 1)
);
end svec_v0_afpga_top;
architecture rtl of svec_v0_afpga_top is
------------------------------------------------------------------------------
-- Components declaration
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- Constants declaration
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- Signals declaration
------------------------------------------------------------------------------
begin
end rtl;
hdl/svec_v0_sfpga.ucf → hdl/sfpga/svec_v0_sfpga.ucf
View file @ 76e01d95
......@@ -31,87 +31,87 @@ NET "vme_berr_o" LOC = C1;
NET "vme_as_n_i" LOC = F5;
NET "vme_a_oe_n_o" LOC = K5;
NET "vme_a_dir_o" LOC = B2;
NET "vme_irq7_o" LOC = C11;
NET "vme_irq6_o" LOC = C8;
NET "vme_irq5_o" LOC = D8;
NET "vme_irq4_o" LOC = C10;
NET "vme_irq3_o" LOC = E10;
NET "vme_irq2_o" LOC = E8;
NET "vme_irq1_o" LOC = E7;
NET "vme_ga4_i" LOC = A10;
NET "vme_ga3_i" LOC = B10;
NET "vme_ga2_i" LOC = A9;
NET "vme_ga1_i" LOC = C9;
NET "vme_ga0_i" LOC = A8;
NET "vme_d31_b" LOC = F7;
NET "vme_d30_b" LOC = A6;
NET "vme_d29_b" LOC = B6;
NET "vme_d28_b" LOC = C5;
NET "vme_d27_b" LOC = D5;
NET "vme_d26_b" LOC = A5;
NET "vme_d25_b" LOC = B5;
NET "vme_d24_b" LOC = A4;
NET "vme_d23_b" LOC = T8;
NET "vme_d22_b" LOC = P8;
NET "vme_d21_b" LOC = N8;
NET "vme_d20_b" LOC = M9;
NET "vme_d19_b" LOC = T9;
NET "vme_d18_b" LOC = R9;
NET "vme_d17_b" LOC = M10;
NET "vme_d16_b" LOC = L10;
NET "vme_d15_b" LOC = N6;
NET "vme_d14_b" LOC = M6;
NET "vme_d13_b" LOC = T4;
NET "vme_d12_b" LOC = P4;
NET "vme_d11_b" LOC = L7;
NET "vme_d10_b" LOC = L8;
NET "vme_d9_b" LOC = P5;
NET "vme_d8_b" LOC = N5;
NET "vme_d7_b" LOC = T5;
NET "vme_d6_b" LOC = R5;
NET "vme_d5_b" LOC = T6;
NET "vme_d4_b" LOC = P6;
NET "vme_d3_b" LOC = T7;
NET "vme_d2_b" LOC = R7;
NET "vme_d1_b" LOC = M7;
NET "vme_d0_b" LOC = P7;
NET "vme_am5_i" LOC = B8;
NET "vme_am4_i" LOC = C6;
NET "vme_am3_i" LOC = D6;
NET "vme_am2_i" LOC = A7;
NET "vme_am1_i" LOC = C7;
NET "vme_am0_i" LOC = E6;
NET "vme_a31_b" LOC = E1;
NET "vme_a30_b" LOC = E2;
NET "vme_a29_b" LOC = L5;
NET "vme_a28_b" LOC = L4;
NET "vme_a27_b" LOC = H3;
NET "vme_a26_b" LOC = J4;
NET "vme_a25_b" LOC = K3;
NET "vme_a24_b" LOC = F1;
NET "vme_a23_b" LOC = F2;
NET "vme_a22_b" LOC = G1;
NET "vme_a21_b" LOC = G3;
NET "vme_a20_b" LOC = H1;
NET "vme_a19_b" LOC = H2;
NET "vme_a18_b" LOC = J1;
NET "vme_a17_b" LOC = J3;
NET "vme_a16_b" LOC = K1;
NET "vme_a15_b" LOC = K2;
NET "vme_a14_b" LOC = L1;
NET "vme_a13_b" LOC = L3;
NET "vme_a12_b" LOC = M1;
NET "vme_a11_b" LOC = M2;
NET "vme_a10_b" LOC = N1;
NET "vme_a9_b" LOC = N3;
NET "vme_a8_b" LOC = P1;
NET "vme_a7_b" LOC = P2;
NET "vme_a6_b" LOC = R1;
NET "vme_a5_b" LOC = R2;
NET "vme_a4_b" LOC = N4;
NET "vme_a3_b" LOC = M5;
NET "vme_a2_b" LOC = M3;
NET "vme_a1_b" LOC = M4;
NET "vme_irq_o[7]" LOC = C11;
NET "vme_irq_o[6]" LOC = C8;
NET "vme_irq_o[5]" LOC = D8;
NET "vme_irq_o[4]" LOC = C10;
NET "vme_irq_o[3]" LOC = E10;
NET "vme_irq_o[2]" LOC = E8;
NET "vme_irq_o[1]" LOC = E7;
NET "vme_ga_i[4]" LOC = A10;
NET "vme_ga_i[3]" LOC = B10;
NET "vme_ga_i[2]" LOC = A9;
NET "vme_ga_i[1]" LOC = C9;
NET "vme_ga_i[0]" LOC = A8;
NET "vme_d_b[31]" LOC = F7;
NET "vme_d_b[30]" LOC = A6;
NET "vme_d_b[29]" LOC = B6;
NET "vme_d_b[28]" LOC = C5;
NET "vme_d_b[27]" LOC = D5;
NET "vme_d_b[26]" LOC = A5;
NET "vme_d_b[25]" LOC = B5;
NET "vme_d_b[24]" LOC = A4;
NET "vme_d_b[23]" LOC = T8;
NET "vme_d_b[22]" LOC = P8;
NET "vme_d_b[21]" LOC = N8;
NET "vme_d_b[20]" LOC = M9;
NET "vme_d_b[19]" LOC = T9;
NET "vme_d_b[18]" LOC = R9;
NET "vme_d_b[17]" LOC = M10;
NET "vme_d_b[16]" LOC = L10;
NET "vme_d_b[15]" LOC = N6;
NET "vme_d_b[14]" LOC = M6;
NET "vme_d_b[13]" LOC = T4;
NET "vme_d_b[12]" LOC = P4;
NET "vme_d_b[11]" LOC = L7;
NET "vme_d_b[10]" LOC = L8;
NET "vme_d_b[9]" LOC = P5;
NET "vme_d_b[8]" LOC = N5;
NET "vme_d_b[7]" LOC = T5;
NET "vme_d_b[6]" LOC = R5;
NET "vme_d_b[5]" LOC = T6;
NET "vme_d_b[4]" LOC = P6;
NET "vme_d_b[3]" LOC = T7;
NET "vme_d_b[2]" LOC = R7;
NET "vme_d_b[1]" LOC = M7;
NET "vme_d_b[0]" LOC = P7;
NET "vme_am_i[5]" LOC = B8;
NET "vme_am_i[4]" LOC = C6;
NET "vme_am_i[3]" LOC = D6;
NET "vme_am_i[2]" LOC = A7;
NET "vme_am_i[1]" LOC = C7;
NET "vme_am_i[0]" LOC = E6;
NET "vme_a_b[31]" LOC = E1;
NET "vme_a_b[30]" LOC = E2;
NET "vme_a_b[29]" LOC = L5;
NET "vme_a_b[28]" LOC = L4;
NET "vme_a_b[27]" LOC = H3;
NET "vme_a_b[26]" LOC = J4;
NET "vme_a_b[25]" LOC = K3;
NET "vme_a_b[24]" LOC = F1;
NET "vme_a_b[23]" LOC = F2;
NET "vme_a_b[22]" LOC = G1;
NET "vme_a_b[21]" LOC = G3;
NET "vme_a_b[20]" LOC = H1;
NET "vme_a_b[19]" LOC = H2;
NET "vme_a_b[18]" LOC = J1;
NET "vme_a_b[17]" LOC = J3;
NET "vme_a_b[16]" LOC = K1;
NET "vme_a_b[15]" LOC = K2;
NET "vme_a_b[14]" LOC = L1;
NET "vme_a_b[13]" LOC = L3;
NET "vme_a_b[12]" LOC = M1;
NET "vme_a_b[11]" LOC = M2;
NET "vme_a_b[10]" LOC = N1;
NET "vme_a_b[9]" LOC = N3;
NET "vme_a_b[8]" LOC = P1;
NET "vme_a_b[7]" LOC = P2;
NET "vme_a_b[6]" LOC = R1;
NET "vme_a_b[5]" LOC = R2;
NET "vme_a_b[4]" LOC = N4;
NET "vme_a_b[3]" LOC = M5;
NET "vme_a_b[2]" LOC = M3;
NET "vme_a_b[1]" LOC = M4;
#----------------------------------------
# Application FPGA boot control
......@@ -135,45 +135,46 @@ NET "pll_ce_o" LOC = G14;
# Switches and button
#----------------------------------------
NET "pushbutton_i" LOC = N16;
NET "noga0_i" LOC = E13;
NET "noga1_i" LOC = E12;
NET "noga2_i" LOC = B15;
NET "noga3_i" LOC = B16;
NET "noga4_i" LOC = F12;
NET "switch0_i" LOC = D14;
NET "switch1_i" LOC = D16;
NET "noga_i[0]" LOC = E13;
NET "noga_i[1]" LOC = E12;
NET "noga_i[2]" LOC = B15;
NET "noga_i[3]" LOC = B16;
NET "noga_i[4]" LOC = F12;
NET "switch_i[0]" LOC = D14;
NET "switch_i[1]" LOC = D16;
NET "usega_i" LOC = G11;
#----------------------------------------
# Inter-FPGA lines
#----------------------------------------
NET "rsvd0_b" LOC = G16;
NET "rsvd1_b" LOC = H15;
NET "rsvd2_b" LOC = H16;
NET "rsvd3_b" LOC = J14;
NET "rsvd4_b" LOC = J16;
NET "rsvd5_b" LOC = K15;
NET "rsvd6_b" LOC = K16;
NET "rsvd7_b" LOC = M15;
NET "rsvd_b[0]" LOC = G16;
NET "rsvd_b[1]" LOC = H15;
NET "rsvd_b[2]" LOC = H16;
NET "rsvd_b[3]" LOC = J14;
NET "rsvd_b[4]" LOC = J16;
NET "rsvd_b[5]" LOC = K15;
NET "rsvd_b[6]" LOC = K16;
NET "rsvd_b[7]" LOC = M15;
#----------------------------------------
# LEDs
#----------------------------------------
NET "debugled2_o" LOC = P15;
NET "debugled1_o" LOC = L16;
NET "debugled_o[2]" LOC = P15;
NET "debugled_o[1]" LOC = L16;
#----------------------------------------
# Boot interface
#----------------------------------------
NET "sfpga_cclk_o" LOC = R11;
NET "sfpga_cso_b_o" LOC = T3;
NET "sfpga_miso_i" LOC = P10;
NET "sfpga_mosi_o" LOC = T10;
#NET "sfpga_program" LOC = T2;
#NET "sfpga_done" LOC = P13;
#NET "sfpga_cclk" LOC = R11;
#NET "sfpga_cso_b" LOC = T3;
#NET "sfpga_init_b" LOC = R3;
#NET "sfpga_m0" LOC = T11;
#NET "sfpga_m1" LOC = N11;
#NET "sfpga_miso" LOC = P10;
#NET "sfpga_mosi" LOC = T10;
#----------------------------------------
# JTAG interface
......@@ -216,87 +217,87 @@ NET "vme_berr_o" IOSTANDARD = "LVCMOS33";
NET "vme_as_n_i" IOSTANDARD = "LVCMOS33";
NET "vme_a_oe_n_o" IOSTANDARD = "LVCMOS33";
NET "vme_a_dir_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq7_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq6_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq5_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq4_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq3_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq2_o" IOSTANDARD = "LVCMOS33";
NET "vme_irq1_o" IOSTANDARD = "LVCMOS33";
NET "vme_ga4_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga3_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga2_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga1_i" IOSTANDARD = "LVCMOS33";
NET "vme_ga0_i" IOSTANDARD = "LVCMOS33";
NET "vme_d31_b" IOSTANDARD = "LVCMOS33";
NET "vme_d30_b" IOSTANDARD = "LVCMOS33";
NET "vme_d29_b" IOSTANDARD = "LVCMOS33";
NET "vme_d28_b" IOSTANDARD = "LVCMOS33";
NET "vme_d27_b" IOSTANDARD = "LVCMOS33";
NET "vme_d26_b" IOSTANDARD = "LVCMOS33";
NET "vme_d25_b" IOSTANDARD = "LVCMOS33";
NET "vme_d24_b" IOSTANDARD = "LVCMOS33";
NET "vme_d23_b" IOSTANDARD = "LVCMOS33";
NET "vme_d22_b" IOSTANDARD = "LVCMOS33";
NET "vme_d21_b" IOSTANDARD = "LVCMOS33";
NET "vme_d20_b" IOSTANDARD = "LVCMOS33";
NET "vme_d19_b" IOSTANDARD = "LVCMOS33";
NET "vme_d18_b" IOSTANDARD = "LVCMOS33";
NET "vme_d17_b" IOSTANDARD = "LVCMOS33";
NET "vme_d16_b" IOSTANDARD = "LVCMOS33";
NET "vme_d15_b" IOSTANDARD = "LVCMOS33";
NET "vme_d14_b" IOSTANDARD = "LVCMOS33";
NET "vme_d13_b" IOSTANDARD = "LVCMOS33";
NET "vme_d12_b" IOSTANDARD = "LVCMOS33";
NET "vme_d11_b" IOSTANDARD = "LVCMOS33";
NET "vme_d10_b" IOSTANDARD = "LVCMOS33";
NET "vme_d9_b" IOSTANDARD = "LVCMOS33";
NET "vme_d8_b" IOSTANDARD = "LVCMOS33";
NET "vme_d7_b" IOSTANDARD = "LVCMOS33";
NET "vme_d6_b" IOSTANDARD = "LVCMOS33";
NET "vme_d5_b" IOSTANDARD = "LVCMOS33";
NET "vme_d4_b" IOSTANDARD = "LVCMOS33";
NET "vme_d3_b" IOSTANDARD = "LVCMOS33";
NET "vme_d2_b" IOSTANDARD = "LVCMOS33";
NET "vme_d1_b" IOSTANDARD = "LVCMOS33";
NET "vme_d0_b" IOSTANDARD = "LVCMOS33";
NET "vme_am5_i" IOSTANDARD = "LVCMOS33";
NET "vme_am4_i" IOSTANDARD = "LVCMOS33";
NET "vme_am3_i" IOSTANDARD = "LVCMOS33";
NET "vme_am2_i" IOSTANDARD = "LVCMOS33";
NET "vme_am1_i" IOSTANDARD = "LVCMOS33";
NET "vme_am0_i" IOSTANDARD = "LVCMOS33";
NET "vme_a31_b" IOSTANDARD = "LVCMOS33";
NET "vme_a30_b" IOSTANDARD = "LVCMOS33";
NET "vme_a29_b" IOSTANDARD = "LVCMOS33";
NET "vme_a28_b" IOSTANDARD = "LVCMOS33";
NET "vme_a27_b" IOSTANDARD = "LVCMOS33";
NET "vme_a26_b" IOSTANDARD = "LVCMOS33";
NET "vme_a25_b" IOSTANDARD = "LVCMOS33";
NET "vme_a24_b" IOSTANDARD = "LVCMOS33";
NET "vme_a23_b" IOSTANDARD = "LVCMOS33";
NET "vme_a22_b" IOSTANDARD = "LVCMOS33";
NET "vme_a21_b" IOSTANDARD = "LVCMOS33";
NET "vme_a20_b" IOSTANDARD = "LVCMOS33";
NET "vme_a19_b" IOSTANDARD = "LVCMOS33";
NET "vme_a18_b" IOSTANDARD = "LVCMOS33";
NET "vme_a17_b" IOSTANDARD = "LVCMOS33";
NET "vme_a16_b" IOSTANDARD = "LVCMOS33";
NET "vme_a15_b" IOSTANDARD = "LVCMOS33";
NET "vme_a14_b" IOSTANDARD = "LVCMOS33";
NET "vme_a13_b" IOSTANDARD = "LVCMOS33";
NET "vme_a12_b" IOSTANDARD = "LVCMOS33";
NET "vme_a11_b" IOSTANDARD = "LVCMOS33";
NET "vme_a10_b" IOSTANDARD = "LVCMOS33";
NET "vme_a9_b" IOSTANDARD = "LVCMOS33";
NET "vme_a8_b" IOSTANDARD = "LVCMOS33";
NET "vme_a7_b" IOSTANDARD = "LVCMOS33";
NET "vme_a6_b" IOSTANDARD = "LVCMOS33";
NET "vme_a5_b" IOSTANDARD = "LVCMOS33";
NET "vme_a4_b" IOSTANDARD = "LVCMOS33";
NET "vme_a3_b" IOSTANDARD = "LVCMOS33";
NET "vme_a2_b" IOSTANDARD = "LVCMOS33";
NET "vme_a1_b" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[7]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[6]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[5]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[4]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[3]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[2]" IOSTANDARD = "LVCMOS33";
NET "vme_irq_o[1]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[4]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[3]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[2]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[1]" IOSTANDARD = "LVCMOS33";
NET "vme_ga_i[0]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[31]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[30]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[29]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[28]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[27]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[26]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[25]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[24]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[23]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[22]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[21]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[20]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[19]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[18]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[17]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[16]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[15]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[14]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[13]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[12]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[11]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[10]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[9]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[8]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[7]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[6]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[5]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[4]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[3]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[2]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[1]" IOSTANDARD = "LVCMOS33";
NET "vme_d_b[0]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[5]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[4]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[3]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[2]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[1]" IOSTANDARD = "LVCMOS33";
NET "vme_am_i[0]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[31]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[30]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[29]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[28]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[27]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[26]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[25]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[24]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[23]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[22]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[21]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[20]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[19]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[18]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[17]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[16]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[15]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[14]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[13]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[12]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[11]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[10]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[9]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[8]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[7]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[6]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[5]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[4]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[3]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[2]" IOSTANDARD = "LVCMOS33";
NET "vme_a_b[1]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Application FPGA boot control
......@@ -320,45 +321,46 @@ NET "pll_ce_o" IOSTANDARD = "LVCMOS33";
# Switches and button
#----------------------------------------
NET "pushbutton_i" IOSTANDARD = "LVCMOS33";
NET "noga0_i" IOSTANDARD = "LVCMOS33";
NET "noga1_i" IOSTANDARD = "LVCMOS33";
NET "noga2_i" IOSTANDARD = "LVCMOS33";
NET "noga3_i" IOSTANDARD = "LVCMOS33";
NET "noga4_i" IOSTANDARD = "LVCMOS33";
NET "switch0_i" IOSTANDARD = "LVCMOS33";
NET "switch1_i" IOSTANDARD = "LVCMOS33";
NET "noga_i[0]" IOSTANDARD = "LVCMOS33";
NET "noga_i[1]" IOSTANDARD = "LVCMOS33";
NET "noga_i[2]" IOSTANDARD = "LVCMOS33";
NET "noga_i[3]" IOSTANDARD = "LVCMOS33";
NET "noga_i[4]" IOSTANDARD = "LVCMOS33";
NET "switch_i[0]" IOSTANDARD = "LVCMOS33";
NET "switch_i[1]" IOSTANDARD = "LVCMOS33";
NET "usega_i" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Inter-FPGA lines
#----------------------------------------
NET "rsvd0_b" IOSTANDARD = "LVCMOS33";
NET "rsvd1_b" IOSTANDARD = "LVCMOS33";
NET "rsvd2_b" IOSTANDARD = "LVCMOS33";
NET "rsvd3_b" IOSTANDARD = "LVCMOS33";
NET "rsvd4_b" IOSTANDARD = "LVCMOS33";
NET "rsvd5_b" IOSTANDARD = "LVCMOS33";
NET "rsvd6_b" IOSTANDARD = "LVCMOS33";
NET "rsvd7_b" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[0]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[1]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[2]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[3]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[4]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[5]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[6]" IOSTANDARD = "LVCMOS33";
NET "rsvd_b[7]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# LEDs
#----------------------------------------
NET "debugled2_o" IOSTANDARD = "LVCMOS33";
NET "debugled1_o" IOSTANDARD = "LVCMOS33";
NET "debugled_o[2]" IOSTANDARD = "LVCMOS33";
NET "debugled_o[1]" IOSTANDARD = "LVCMOS33";
#----------------------------------------
# Boot interface
#----------------------------------------
#NET "sfpga_program" IOSTANDARD = "LVCMOS33";
#NET "sfpga_done" IOSTANDARD = "LVCMOS33";
#NET "sfpga_cclk" IOSTANDARD = "LVCMOS33";
#NET "sfpga_cso_b" IOSTANDARD = "LVCMOS33";
#NET "sfpga_init_b" IOSTANDARD = "LVCMOS33";
#NET "sfpga_m0" IOSTANDARD = "LVCMOS33";
#NET "sfpga_m1" IOSTANDARD = "LVCMOS33";
#NET "sfpga_miso" IOSTANDARD = "LVCMOS33";
#NET "sfpga_mosi" IOSTANDARD = "LVCMOS33";
NET "sfpga_cclk_o" LOC = R11;
NET "sfpga_cso_b_o" LOC = T3;
NET "sfpga_miso_i" LOC = P10;
NET "sfpga_mosi_o" LOC = T10;
#NET "sfpga_program" LOC = T2;
#NET "sfpga_done" LOC = P13;
#NET "sfpga_init_b" LOC = R3;
#NET "sfpga_m0" LOC = T11;
#NET "sfpga_m1" LOC = N11;
#----------------------------------------
# JTAG interface
......
hdl/sfpga/svec_v0_sfpga_top.vhd 0 → 100644
View file @ 76e01d95
--------------------------------------------------------------------------------
-- CERN (BE-CO-HT)
-- Top level entity for Simple VME FMC Carrier (SVEC) System FPGA
-- http://www.ohwr.org/projects/svec
--------------------------------------------------------------------------------
--
-- unit name: svec_v0_sfpga_top
--
-- author: Matthieu Cattin (matthieu.cattin@cern.ch)
--
-- date: 14-06-2012
--
-- version: 1.0
--
-- description: Generic top level entity for the system FPGA of the
-- Simple VME FMC Carrier (SVEC)
--
-- dependencies:
--
--------------------------------------------------------------------------------
-- GNU LESSER GENERAL PUBLIC LICENSE
--------------------------------------------------------------------------------
-- This source file is free software; you can redistribute it and/or modify it
-- under the terms of the GNU Lesser General Public License as published by the
-- Free Software Foundation; either version 2.1 of the License, or (at your
-- option) any later version. This source is distributed in the hope that it
-- will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty
-- of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-- See the GNU Lesser General Public License for more details. You should have
-- received a copy of the GNU Lesser General Public License along with this
-- source; if not, download it from http://www.gnu.org/licenses/lgpl-2.1.html
--------------------------------------------------------------------------------
-- last changes: see svn log.
--------------------------------------------------------------------------------
-- TODO: -
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.NUMERIC_STD.all;
--library UNISIM;
--use UNISIM.vcomponents.all;
library work;
entity svec_v0_sfpga_top is
generic(
g_GENERIC : string := "FALSE");
port
(
----------------------------------------
-- VME interface
----------------------------------------
vme_write_n_i : in std_logic;
vme_trst_i : in std_logic;
vme_tms_i : in std_logic;
vme_tdo_oe_o : out std_logic;
vme_tdo_o : out std_logic;
vme_tdi_i : in std_logic;
vme_tck_i : in std_logic;
vme_sysreset_n_i : in std_logic;
vme_sysclk_i : in std_logic;
vme_retry_oe_o : out std_logic;
vme_retry_n_o : out std_logic;
vme_lword_n_b : inout std_logic;
vme_iackout_n_o : out std_logic;
vme_iackin_n_i : in std_logic;
vme_iack_n_o : out std_logic;
vme_gap_i : in std_logic;
vme_dtack_oe_o : out std_logic;
vme_dtack_n_o : out std_logic;
vme_ds2_n_i : in std_logic;
vme_ds1_n_i : in std_logic;
vme_d_oe_n_o : out std_logic;
vme_d_dir_o : out std_logic;
vme_berr_o : out std_logic;
vme_as_n_i : in std_logic;
vme_a_oe_n_o : out std_logic;
vme_a_dir_o : out std_logic;
vme_irq_o : out std_logic_vector(7 downto 1);
vme_ga_i : in std_logic_vector(4 downto 0);
vme_d_b : inout std_logic_vector(31 downto 0);
vme_am_i : in std_logic_vector(5 downto 0);
vme_a_b : inout std_logic_vector(31 downto 1);
----------------------------------------
-- Application FPGA boot control
----------------------------------------
boot_clk_o : out std_logic;
boot_config_o : out std_logic;
boot_done_i : in std_logic;
boot_dout_o : out std_logic;
boot_status_i : in std_logic;
----------------------------------------
-- Clock and reset inputs
----------------------------------------
rst_n_i : in std_logic;
lclk_n_i : in std_logic;
pll_2sfpga_n_i : in std_logic;
pll_2sfpga_p_i : in std_logic;
pll_ce_o : out std_logic;
----------------------------------------
-- Switches and button
----------------------------------------
pushbutton_i : in std_logic;
noga_i : in std_logic_vector(4 downto 0);
switch_i : in std_logic_vector(1 downto 0);
usega_i : in std_logic;
----------------------------------------
-- Inter-FPGA lines
----------------------------------------
rsvd_b : inout std_logic_vector(7 downto 0);
----------------------------------------
-- LEDs
----------------------------------------
debugled_o : out std_logic_vector(2 downto 1);
----------------------------------------
-- Boot interface
----------------------------------------
sfpga_cclk_o : out std_logic;
sfpga_cso_b_o : out std_logic;
sfpga_miso_i : in std_logic;
sfpga_mosi_o : out std_logic
);
end svec_v0_sfpga_top;
architecture rtl of svec_v0_sfpga_top is
------------------------------------------------------------------------------
-- Components declaration
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- Constants declaration
------------------------------------------------------------------------------
------------------------------------------------------------------------------
-- Signals declaration
------------------------------------------------------------------------------
begin
end rtl;
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