svec-golden.in

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@comment %**start of header
@documentlanguage en
@documentencoding UTF-8
@setfilename fine-delay.info
@settitle svec-golden
@iftex
@afourpaper
@end iftex
@paragraphindent 3
@comment %**end of header

@setchapternewpage off

@set update-month October 2012

@finalout

@titlepage
@title @i{Golden} bitstream for the SVEC card
@subtitle Programmer's manual
@author CERN BE-CO-HT / Tomasz Włostowski

@end titlepage
@headings single

@iftex
@contents
@end iftex

@c ##########################################################################
@node Top
@chapter Introduction

The SVEC Application FPGA golden bitstream allows the SVEC device driver to:
@itemize
@item Query the board's serial number,
@item Check the presence of the FMC mezzanines,
@item Read out their @math{I^2C} identification EEPROMs.
@end itemize
The bitstream does not drive any of the mezzanine user/clock pins to protect from electrical damage resulting from mismatched
I/O standards.

@chapter Using the bitstream

@section Block diagram

The bitstream encompasses @math{I^2C}, OneWire and GPIO modules from the @code{general-cores} library. For further details, refer to the library's manual.

@float Figure,fig:block
@center @image{drawings/golden_block, 15cm,,,.pdf}
@caption{Block diagram of the SVEC golden gateware.}
@end float

Presence detection is done by reading out the @code{PRSNT} lines (active low) through the GPIO port. EEPROM readout is performed via the two @math{I^2C} masters. Board serial number
is equal to the serial number of the DS18B20U+ temperature sensor, accessible via the OneWire master. The clock freqency for @code{I^2C} and OneWire dividers calculation is 62.5 MHz. 

@section Memory map

@b{Warning:} Please do not hardcode the base addresses of the cores, query them from the SDB descriptor. The SDB address of @code{0x0} is guaranteed to stay constant.
Only A32/A24/D32/CSR address modifiers are supported.

@multitable @columnfractions .20 .10 .15 .65
@headitem Core @tab Base address @tab Library @tab Description
@item @code{sdb_rom} @tab @code{0x0} @tab @code{general-cores} @tab SDB descriptor.
@item @code{xwb_i2c_master} @tab @code{0x10000} @tab @code{general-cores} @tab I2C Master for accessing FMC 1 identification EEPROM.
@item @code{xwb_i2c_master} @tab @code{0x11000} @tab @code{general-cores} @tab I2C Master for accessing FMC 2 identification EEPROM.
@item @code{xwb_onewire_master} @tab @code{0x12000} @tab @code{general-cores} @tab OneWire Master for accessing temperature sensor/serial ID.
@item @code{xwb_gpio_port} @tab @code{0x13000} @tab @code{general-cores} @tab GPIO port for accessing FMC1/2 presence lines.
@end multitable
   
@bye