Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
P
PXIe FMC Carrier Board - SPEXI7U
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Board
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
Projects
PXIe FMC Carrier Board - SPEXI7U
Commits
bf4727de
Commit
bf4727de
authored
Jul 30, 2021
by
Paul PERONNARD
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Update doc/index.rst
parent
231b0e0e
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
2 additions
and
2 deletions
+2
-2
index.rst
doc/index.rst
+2
-2
No files found.
doc/index.rst
View file @
bf4727de
...
...
@@ -2,9 +2,9 @@
SPDX-License-Identifier: CC-BY-SA-4.0
SPDX-FileCopyrightText: 2019-2020 CERN
================================
================================
====
Welcome to SPEXI7U's documentation!
================================
================================
====
The Simple PXIe FMC Carrier (SPEXI7U) is a 4-lane Gen2 PXIe card that has an
FPGA and can hold one FMC HPC mezzanine and one SFP connector.
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment