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SPEC7
Commit b6b7d9c2 authored by Pascal Bos's avatar Pascal Bos
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fixed issue with hours > 15, added an extra bit.

parent 77ad7376
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    hdl/top/spec7_ref_design/wr_irigb_conv.vhd
    View file @ b6b7d9c2
    ......@@ -86,7 +86,7 @@ architecture Behavioral of wr_irigb_conv is
    signal seconds : std_logic_vector(5 downto 0);
    signal minutes : std_logic_vector(5 downto 0);
    signal hours : std_logic_vector(3 downto 0);
    signal hours : std_logic_vector(4 downto 0);
    signal days : std_logic_vector(8 downto 0);
    signal years : std_logic_vector(39 downto 0); --should outlast the sun
    signal sbs : std_logic_vector(17 downto 0);
    ......@@ -307,7 +307,7 @@ begin
    all_rdy(1) := '1';
    end if;
    if divider_output_valids(2) = '1' then --latch hours
    hours <= remainders(2)(3 downto 0);
    hours <= remainders(2)(4 downto 0);
    all_rdy(2) := '1';
    end if;
    if divider_output_valids(3) = '1' then --calculate days and years.
    ......@@ -633,8 +633,8 @@ hours_bcd_divider : bcd_divider
    s_axis_divisor_tdata => x"0A",
    s_axis_dividend_tvalid => enable_bcd_conv,
    s_axis_dividend_tready => open,
    s_axis_dividend_tdata(15 downto 4) => (others => '0'),
    s_axis_dividend_tdata(3 downto 0) => hours,
    s_axis_dividend_tdata(15 downto 5) => (others => '0'),
    s_axis_dividend_tdata(4 downto 0) => hours,
    m_axis_dout_tvalid => open,
    m_axis_dout_tdata => hours_bcd_tdata
    );
    ......
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