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various authored by Erik van der Bij's avatar Erik van der Bij
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......@@ -49,6 +49,12 @@ Low-Jitter
Daughterboard](https://www.ohwr.org/project/wrs-low-jitter/wiki) (a
4-layer PCB).
* Production needed by 2019 as Gennum PCIe chip not available
anymore.
* Long development needed: HW design, use of other PCIe bridge,
become acquainted with partial reconfiguration.
* The existing SPEC with WRS are the two flagship OH projects and the
SPEC7 therefore may not fail as project.
......@@ -106,7 +112,7 @@ alternative.
[XC6SLX45T-3FGG484C](https://www.eciaauthorized.com/en/search/XC6SLX45T-3FGG484C)
on SPEC: (~84 Euro without STEP pricing)
- 8 GTX Transceivers max (4 used for PCIe, 1 for SFP, 1 for
FMC <s>as on SPEC</s> and 2 for SATA).
FMC - as on SPEC - and 2 for SATA).
- A 70T in FBG484 package cannot be used as has only 4 GTX
Transceivers (No need to check if can be used on
footprint of FBG676)
......@@ -140,6 +146,10 @@ alternative.
- HPC would be interesting for some applications like high-speed
ADCs where you need to go massively parallel to avoid too high
bandwidth requirements on the data lines.
- However, not additional GTX lines available (or two when would
not have SATA connectors anymore).
- Cannot fully populate HPC lines with proposed Xilinx package
(TBC)
- Test and debug using a [Xilinx FMC-XM105 debug
card](https://www.xilinx.com/products/boards-and-kits/hw-fmc-xm105-g.html)
- *HPC: need new tests tools for production test*
......@@ -160,41 +170,15 @@ alternative.
### FMC connector
- Vadj
- programmable IC, or just a few values and selection with
jumpers?
### SFP
- Double SFP for allowing redundant links?
- *not possible to fit on PCIe front-panel*
- [Image of double FMC cage with
LEDs](http://www.rego.com.tw/_admin/upload/product/rego_15034811417ioq13.jpg)
- Image of double decker FMC cage with
LEDs":https://media.rs-online.com/t_large/R7871705-01.jpg
- Could maybe fit if would make 2-slot card when optional
heatsink/fan solution that extends it into the neighboring slot.
Double decker would not work here though.
- Compact SFP (CSFP)?
- Has two bidi standard SFPs in one SFP module
- CSFPs have a little different pinout comparing to the standard
SFPs. Same mechanics as standard SFP
([Wikipedia](https://en.wikipedia.org/wikis/Small_form-factor_pluggable_transceiver#csfp)).
- [Difference between SFP, bidi SFP and
CSFP](http://www.cables-solutions.com/differences-between-sfp-bidi-sfp-and-compact-sfp.html)
- [CSFP Delta
CSFP-33-A4K1DBT](http://www.deltaww.com/filecenter/Products/download/04/0405/BiDi/CSFP-33-A4K1DBT_S0.pdf)
(pinout on page 4)
- Check if use of CSFP would limit the use of standard SFP modules
- Actually cannot be used to daisy chain modules: "The compact SFP
(GLC-2BX-D) usually uses 1490nm to transmit signal and the
1310nm to receive signal".
- programmable IC, fixed 2.5V or just a few values and selection
with jumpers?
### RAM
- SO-DIMM socket for RAM
- Or directly assembled RAM IC?
- Use case: data memory for storing data coming from ADC card (e.g.
[fmc-adc-100m14b4cha](https://www.ohwr.org/project/fmc-adc-100m14b4cha/wiki)
[fmc-adc-100m14b4cha](https://www.ohwr.org/project/fmc-adc-100m14b4cha/wiki))
### FLASH storage
......@@ -213,25 +197,13 @@ alternative.
bridge](https://www.silabs.com/documents/public/data-sheets/CP2105.pdf).
Quite handy if you have a WRPC gui and other logic in your FPGA.
### SATA
\* Cannot have SATA anymore?
*\* 8 GTX Transceivers max (4 used for PCIe, 1 for SFP, 1 for FMC
<s>as on SPEC</s> and 2 for SATA).
- Keep same two SATA connectors as on SPEC.
- Planned to be used on SPEC for daisy-chaining triggers between
SPECs with FMC-ADCs with modified gateware. However, no users
that we know of (external users possibly?)
- Is a connector specifically for internal use (i.e., not
panel-mounted).
- May be used as well for digital interface for external PLL loop.
### PCB
- 10 layer PCB so that layout can be optimised for low-jitter
oscillator
oscillator (really needed?). HPC would surely need many layers.
- Compare to
- SPEC has 6-layer PCB
- WR Low-jitter board has just 4 layers
### Additional connectors
......@@ -264,10 +236,49 @@ Some extra's that were on our list:
## Accepted
### SATA
- Keep same two SATA connectors as on SPEC.
- Planned to be used on SPEC for daisy-chaining triggers between
SPECs with FMC-ADCs with modified gateware. However, no users
that we know of now (WRXI may use it, and external users
possibly?)
- Is a connector specifically for internal use (i.e., not
panel-mounted).
- 8 GTX Transceivers max (4 used for PCIe, 1 for SFP, 1 for FMC - as
on SPEC - and 2 for SATA).**** May be used as well for digital
interface for external PLL loop.
-----
## Rejected
### SFP
- Double SFP for allowing redundant links?
- *not possible to fit on PCIe front-panel*
- [Image of double FMC cage with
LEDs](http://www.rego.com.tw/_admin/upload/product/rego_15034811417ioq13.jpg)
- Image of double decker FMC cage with
LEDs":https://media.rs-online.com/t_large/R7871705-01.jpg
- Could maybe fit if would make 2-slot card when optional
heatsink/fan solution that extends it into the neighboring slot.
Double decker would not work here though.
- Compact SFP (CSFP)?
- Has two bidi standard SFPs in one SFP module
- CSFPs have a little different pinout comparing to the standard
SFPs. Same mechanics as standard SFP
([Wikipedia](https://en.wikipedia.org/wikis/Small_form-factor_pluggable_transceiver#csfp)).
- [Difference between SFP, bidi SFP and
CSFP](http://www.cables-solutions.com/differences-between-sfp-bidi-sfp-and-compact-sfp.html)
- [CSFP Delta
CSFP-33-A4K1DBT](http://www.deltaww.com/filecenter/Products/download/04/0405/BiDi/CSFP-33-A4K1DBT_S0.pdf)
(pinout on page 4)
- Check if use of CSFP would limit the use of standard SFP modules
- Actually cannot be used to daisy chain modules: "The compact SFP
(GLC-2BX-D) usually uses 1490nm to transmit signal and the
1310nm to receive signal".
-----
25 January 2018
......