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Simple PCIe FMC carrier SPEC
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Simple PCIe FMC carrier SPEC
Issues
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V4 - Order number of PCIe bracket not clear
#45
· opened
Apr 25, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
PTS - Are Vendor ID and Device ID configured by PTS?
#44
· opened
May 07, 2012
by
Erik van der Bij
support
CLOSED
1
updated
Feb 12, 2019
V4 - Decoupling done different than Xilinx AN
#43
· opened
May 23, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Line impedances should be verified
#42
· opened
May 23, 2012
by
Erik van der Bij
feature
3
updated
Feb 12, 2019
V4 - Repository data old
#41
· opened
May 30, 2012
by
Erik van der Bij
support
0
updated
Feb 12, 2019
Document supply to LPC connector
#40
· opened
May 30, 2012
by
Erik van der Bij
support
1
updated
Feb 12, 2019
PTS - Improve DDR memory test program
#39
· opened
Jun 27, 2012
by
Erik van der Bij
support
2
updated
Feb 12, 2019
V4 - DDR3 pending End-of-life
#38
· opened
Jul 10, 2012
by
Erik van der Bij
feature
1
updated
Feb 12, 2019
PTS - VHDL files are not stored in repository
#37
· opened
Jul 18, 2012
by
Erik van der Bij
support
0
updated
Feb 12, 2019
V4 - 3V3 regulator resistor values wrong
#36
· opened
Sep 21, 2012
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Add LED on FPGA DONE pin
#35
· opened
Nov 01, 2012
by
Projects
feature
0
updated
Feb 12, 2019
V1.1 - 3V3 on FMC mezzanine too low
#34
· opened
Nov 06, 2012
by
Erik van der Bij
bug
CLOSED
0
updated
Feb 12, 2019
V4 - Plating of PCIe card edge connector not specified
#33
· opened
Dec 19, 2012
by
Erik van der Bij
bug
0
updated
Feb 12, 2019
V4-0 - enlarge via size 450um to 550um
#32
· opened
Jan 11, 2013
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Consider adding connector to supply a fan
#31
· opened
Jun 19, 2013
by
Erik van der Bij
feature
0
updated
Feb 12, 2019
V4 - Space between miniUSB and JTAG connector must increase 1mm
#30
· opened
Oct 17, 2013
by
Benoit Rat
bug
0
updated
Feb 12, 2019
V4 - Reset timing of CDCM61004
#29
· opened
Feb 07, 2014
by
Tomasz Wlostowski
feature
0
updated
Feb 12, 2019
SPI flash PROM latency
#28
· opened
Mar 13, 2014
by
Magnus Sundal
0
updated
Feb 12, 2019
V4 - PCB revision resistors are set to 3 instead of 4.
#27
· opened
Mar 21, 2014
by
Projects
bug
1
updated
Feb 12, 2019
V4 - Manage T8 from P3V3_PCIE
#26
· opened
Mar 21, 2014
by
Projects
feature
0
updated
Feb 12, 2019
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