Commits · 1a72bcbcc9801b7f9bd2184a68988cac52634b13 · Projects / Simple PCIe FMC carrier SPEC

17 Jul, 2019 1 commit

sw:drv: add reset sysfs attributes · 1a72bcbc

Federico Vaga authored Jul 16, 2019

We expose only the application reset because it is the useful one.
Resetting the full design is something that the user can't (should not)
do while the driver is running.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

1a72bcbc

16 Jul, 2019 20 commits
- sw:drv: fix platform_device ID length · 0eb3b26a
  Federico Vaga authored Jul 16, 2019
```
The maximum is 20 characters, make it 19 characters long
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  0eb3b26a
- sw:drv: generalize META data offsets · 84fbb24e
  Federico Vaga authored Jul 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  84fbb24e
- sw:drv: fix application resource assignment · 461d5582
  Federico Vaga authored Jul 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  461d5582
- sw:drv: assign platform_device id automatically · ebd1e2b0
  Federico Vaga authored Jul 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  ebd1e2b0
- sw:drv: build info data format changed · b63cd010
  Federico Vaga authored Jul 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  b63cd010
- sw:drv: group dbg creation in one function · 049dbff2
  Federico Vaga authored Jul 16, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  049dbff2
- sw:drv: remove FPGA devices only when they have been loaded · d8eca4c9
  Federico Vaga authored Jul 15, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  d8eca4c9
- sw:drv: show FPGA configuration build info · 46b97b4e
  Federico Vaga authored Jul 15, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  46b97b4e
- WIP sw:drv: add DMA support · 93c6beab
  Federico Vaga authored Jul 15, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  93c6beab
- sw:drv: reorder IRQ lines · d2ffcb3e
  Federico Vaga authored Jul 15, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  d2ffcb3e
- sw:drv: no need to initialize data structure · 19b15b77
  Federico Vaga authored Jul 11, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  19b15b77
- sw:drv: fix typo · 4edc8a84
  Federico Vaga authored Jul 11, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  4edc8a84
- sw:drv: release the application devices before debug · a1a6b887
  Federico Vaga authored Jul 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  a1a6b887
- sw:drv: fix capability mask · c2fd12f2
  Federico Vaga authored Jul 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  c2fd12f2
- sw:drv: remove unused define · c82a4008
  Federico Vaga authored Jul 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  c82a4008
- sw:drv:dbg: map only what we need · d38b0cf6
  Federico Vaga authored Jul 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  d38b0cf6
- sw:drv: check only major and minor version · 4bb3cf71
  Federico Vaga authored Jul 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  4bb3cf71
- sw:drv: move metadata to spec_fpga · e5535da5
  Federico Vaga authored Jul 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  e5535da5
- sw:drv: merge dbg and gpio files into core · e7c7b7d8
  Federico Vaga authored Jul 10, 2019
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They are only used to configure the spec card, it does not give much
to separate them in smaller files.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  e7c7b7d8
- sw:drv: checkpatch fixes · b711522b
  Federico Vaga authored Jul 10, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  b711522b
09 Jul, 2019 7 commits
- sw:drv: split the device in two parts · f5423aec
  Federico Vaga authored Jul 09, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  f5423aec
- sw:drv: map memory only when necessary · 5f7187a0
  Federico Vaga authored Jul 09, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  5f7187a0
- sw:drv: rmeove unused functions · 2d24d3ed
  Federico Vaga authored Jul 09, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  2d24d3ed
- sw:drv: add sysfs attribute for SPEC CORE · 8bb0be96
  Federico Vaga authored Jul 09, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  8bb0be96
- sw:drv: check thermometer presence on demand · 0c6f191b
  Federico Vaga authored Jul 09, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  0c6f191b
- sw:drv: add debugfs for SPEC CSR registers · f264c172
  Federico Vaga authored Jul 09, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  f264c172
- sw:drv: fix reg names · 757864fb
  Federico Vaga authored Jul 09, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  757864fb
08 Jul, 2019 3 commits

sw:drv: update mem offsets · cdb076bb
Federico Vaga authored Jul 08, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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cdb076bb

sw:drv: move spec-core-fpga device register where it belongs · da4085d5

Federico Vaga authored Jul 08, 2019

The SPEC is made of its PCI bridge (GN4124) and a set of FPGA
devices that enables some carrier feature. The first one is handled
by the Linux pci_dev, the second set of devices have a commond parent
that I am moving into the spec-core-fpga.c file so that all FPGA related
code is in one place
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

da4085d5

sw:drv: move FMC code together with core-fpga · 292e1bd7

Federico Vaga authored Jul 08, 2019

All the FMC logic works only with all the FPGA infrastructure.
So put them togheter since they change together.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

292e1bd7

27 Jun, 2019 9 commits
- sw:drv: make FPGA progrimming error a bit more clear · 56895ca0
  Federico Vaga authored Jun 27, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  56895ca0
- sw:drv: clear therm presence on exit · 7633289f
  Federico Vaga authored Jun 27, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  7633289f
- sw:drv: move GN412X MFD devices to PCI device · 9f3b7e06
  Federico Vaga authored Jun 27, 2019
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GPIO and FCL belong to the GN412X so move them there; this to avoid MFD
conflicts with our other devices beloning to the SPEC.
Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
```
  9f3b7e06
- sw:drv: print more errors · aa3e7026
  Federico Vaga authored Jun 27, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  aa3e7026
- sw:drv: add M25P32 SPI flash · c4a3a471
  Federico Vaga authored Jun 26, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  c4a3a471
- sw:drv: add SPI according to capabilities · 371b9217
  Federico Vaga authored Jun 26, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  371b9217
- sw:drv: fix FPGA memmap · 7abd0b20
  Federico Vaga authored Jun 26, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  7abd0b20
- sw:drv: change bootselect from sysfs · daf6edf3
  Federico Vaga authored Jun 26, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  daf6edf3
- sw:drv: re-write get/set for bootselect · a98296a1
  Federico Vaga authored Jun 26, 2019
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Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
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  a98296a1