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Simple PCIe FMC carrier SPEC
Commit 84fbb24e authored by Federico Vaga's avatar Federico Vaga
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sw:drv: generalize META data offsets 

Signed-off-by: Federico Vaga's avatarFederico Vaga <federico.vaga@cern.ch>
parent 461d5582
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Showing with 23 additions and 12 deletions
software/kernel/spec-core-fpga.c
View file @ 84fbb24e
......@@ -576,11 +576,11 @@ static void spec_fpga_app_id_build(struct spec_fpga *spec_fpga,
if (vendor == 0xFF000000) {
uint32_t vendor_uuid[4];
vendor_uuid[0] = ioread32(spec_fpga->fpga + app_off + 0x30);
vendor_uuid[1] = ioread32(spec_fpga->fpga + app_off + 0x34);
vendor_uuid[2] = ioread32(spec_fpga->fpga + app_off + 0x38);
vendor_uuid[3] = ioread32(spec_fpga->fpga + app_off + 0x3C);
snprintf(id, size, "cern:%16phN:%4phN", &vendor_uuid, &device);
vendor_uuid[0] = ioread32(spec_fpga->fpga + app_off + FPGA_META_UUID + 0x0);
vendor_uuid[1] = ioread32(spec_fpga->fpga + app_off + FPGA_META_UUID + 0x4);
vendor_uuid[2] = ioread32(spec_fpga->fpga + app_off + FPGA_META_UUID + 0x8);
vendor_uuid[3] = ioread32(spec_fpga->fpga + app_off + FPGA_META_UUID + 0xC);
snprintf(id, size, "%16phN%4phN", &vendor_uuid, &device);
} else {
snprintf(id, size, "cern:%4phN:%4phN", &vendor, &device);
}
......
software/kernel/spec.h
View file @ 84fbb24e
......@@ -52,18 +52,29 @@ enum spec_fpga_select {
SPEC_FPGA_SELECT_GN4124_FLASH = 0x0,
};
enum {
/* Metadata */
FPGA_META_VENDOR = 0x00,
FPGA_META_DEVICE = 0x04,
FPGA_META_VERSION = 0x08,
FPGA_META_BOM = 0x0C,
FPGA_META_SRC = 0x10,
FPGA_META_CAP = 0x20,
FPGA_META_UUID = 0x30,
};
enum {
/* Metadata */
SPEC_CORE_FPGA = 0x0,
SPEC_META_BASE = SPEC_CORE_FPGA + 0x00,
SPEC_META_VENDOR = SPEC_META_BASE + 0x00,
SPEC_META_DEVICE = SPEC_META_BASE + 0x04,
SPEC_META_VERSION = SPEC_META_BASE + 0x08,
SPEC_META_BOM = SPEC_META_BASE + 0x0C,
SPEC_META_SRC = SPEC_META_BASE + 0x10,
SPEC_META_CAP = SPEC_META_BASE + 0x20,
SPEC_META_UUID = SPEC_META_BASE + 0x30,
SPEC_META_VENDOR = SPEC_META_BASE + FPGA_META_VENDOR,
SPEC_META_DEVICE = SPEC_META_BASE + FPGA_META_DEVICE,
SPEC_META_VERSION = SPEC_META_BASE + FPGA_META_VERSION,
SPEC_META_BOM = SPEC_META_BASE + FPGA_META_BOM,
SPEC_META_SRC = SPEC_META_BASE + FPGA_META_SRC,
SPEC_META_CAP = SPEC_META_BASE + FPGA_META_CAP,
SPEC_META_UUID = SPEC_META_BASE + FPGA_META_UUID,
};
#define SPEC_META_VENDOR_ID PCI_VENDOR_ID_CERN
......
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