This course applies the learn by example approach, introducing in each section the
required theoretical concepts and then achieving a deeper understanding on the presented topics
by performing practical exercises using the most important design tools and techniques.
Upon completion of the course, several software and hardware reference designs are created by
following step-by-step detailed procedures including screenshots, commands and code snippets.
Development machine with a supported Linux Operating System
Xilinx Vitis Unified Software Development Platform
Xilinx Vivado Design Suite (no additional license required)
FARNELL ref 3050481: Ultra96-V2 Zynq UltraScale+ ZU3EG Single Board Computer
FARNELL ref 3216978: Ultra96 Power Supply Kit, 12V, 4A 03AH7039
FARNELL ref 2915522: Adapter Board, USB To JTAG/UART Adapter Module, For Ultra96 Development Board
FARNELL ref 1617586: USB cable type A to micro type B, 1.5m, USB 2.0
This is the syllabus for the SoC course, covering the main design concepts required to customize and bring-up embedded software in Zynq UltraScale+ MPSoC based hardware platforms. For each of the chapters in the proposed course sessions, the theoretical concepts are supported by practical exercises with detailed step-by-step procedures so that self-learning can be easily accomplished.
Installing the required tools, setting the Ultra96-V2 hardware and testing the set-up before the course.
Introducing the MPSoC architecture, understanding the booting sequence, configuring the MPSoC Processing System in Vivado, understanding the exported hardware information to be used by the Vitis software tools, and practicing with standalone software development.
Managing peripherals in the Processing System, communicating different cores in the MPSoC, understanding the address space hierarchy in the MPSoC, creating custom AXI peripherals with Vivado, and using peripherals placed in the Programmable Logic.
Understanding, configuring and building all of the software components required to successfully boot a Linux runtime in a custom MPSoC based hardware design, and using the Userspace I/O drivers to handle custom peripherals implemented in the Programmable Logic.