- Give priority to the time-out and not the number of msg repetitions
- Call also wr_handshake_fail() function when a time-out is detected.

As the enable_output_timing() hook  is called also in the standard PTP
part, the hook has been moved from the WR specific structure
wrh_operations to  pp_time_operations

- Add a new state machine available for all timing modes ( Free running
master, Grand master and boundary clock)
- State is stored in pp_globals, field timingModeLockingState
- The 3 main states are :
-- Locking: Waiting for PLL locked
-- Locked: PLL is locked
-- Error: PLL is unlocked but was locked before
- Changing the timing mode will reset the state to 'Locking'

- Change the Quality structure to make it compliant with the standard
- Fix network to host conversion to display offsetScaledLogVariance

- Calculations made using fixed pointarythmetic
- delayAsymCoeff calculated using polynomial expansion
- Based on Rens Roosenstein work

If a PLL unlocked is detected on slave side  when the servo is running,
the PTP state is forced to UNCALIBRATED to restart the WR calibration
(handshake)

- Simplify how an instance switch from WR to PTP protocol and vice-versa
- Change the WR state machine: When an unexpected WR signaling message
is received, the state is forced to IDLE. Solve handshake issue when
instance is waiting for an answer with a long time-out and in the other
side the PPSi process is restarted. In this use case the handshake will
fail.

The logic used to control WR switch leds is removed from HAL and
imported into PPSi. It prevents HAL from reading PPSi shared memory.

Modification made to be more coherent as delayCoefficient is in range [-1,1] instead of [-2,2].

This is a temporary implementation that will be reviewed when the PPSi
live configuration will be implemented.

add monitor variable to struct hal_port_state
Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Signed-off-by: Adam Wujek <adam.wujek@cern.ch>

Will be reintroduced later with HA profile.

- Code optimization for size
- HA is not compiled ( only PTP & WR )
- ...

See commit 'Simplify WRS calibration functions' below

- Has Hal is no longer used for ingress/egress latencies, we must then
take them from the configuration file
- Definition used by the common servo (WR & HA)
- Implementation of the IDLE state
See previous commit 'Review of WR protocol implementation'

See commit 'Simplify WRS calibration functions' below

It has been improvement to make it works with WR extension but the final
mechanism has to be improved to make it more simple.

As WR extension share now the same servo than L1Sync extension, the only
service required from HAL is the value of the bit-slide. Then a
simplification can be done by removing some functions and some obsolete
function parameters

This tool is used to follow the value of a monotonic clock to check if
it does not does big jumps. This jumps may affect the precision of the
timeout in PPSi. They can occur when the nanosecond adjustement is done
in the servo (WR & HA profiles).

In WR extension, the egress and ingress latencies are already included
in the exchanged deltas (TX/RX). This modification allows for an
extension to remove the egress/ingress latencies from the calculation of
the RX and TX timestamps. This feature is used in the WR extension.

Force to stay in UNCALIBRATED state if externalPortConfigurationEnabled
is set to true and desiredState to UNCALIBRATED.

- When the number of bit used for the calculation was smaller than 16,
the result of the calculation was 0.

- Take into account the rounding in time conversion
- New implementation of pp_time_hardwarize

- Add extra parameters in unpack_announce and run_ext_state_machine
callbacks

- Removed master_msg, s1, execute slave

- It has now its own state table
- The servo is shared with L1Sync extension. It means that servo
calculation is now following the new standard IEEE 1588
- It stay compatible with older versions of the switch. The correction
field value in the exchange messages are still not compliant with the
standard to keep the compatibility.