Skip to content

  • Projects
  • Groups
  • Snippets
  • Help
    • Loading...
  • Sign in
O
Optical Clock and Data Recovery FMC
  • Project
    • Project
    • Details
    • Activity
    • Cycle Analytics
  • Issues 0
    • Issues 0
    • List
    • Board
    • Labels
    • Milestones
  • Merge Requests 0
    • Merge Requests 0
  • Wiki
    • Wiki
  • image/svg+xml
    Discourse
    • Discourse
  • Members
    • Members
  • Collapse sidebar
  • Activity
  • Create a new issue
  • Issue Boards
  • Projects
  • Optical Clock and Data Recovery FMC
  • Wiki
  • Home

Home

Last edited by OHWR Gitlab support Mar 15, 2019
Page history

Description

An FPGA Mezzanine Card (FMC) for clock & data recovery (CDR) from optical sources has been developed at CERN. Its major components are a commercial clock/recovery IC, an optical receiver with FC connector and an SFP+ cage. The boards also offers two coaxial I/O connectors (LEMO series 00). The FMC is often referred-to as TTC FMC since its main purpose is to play the role of Timing Trigger and Control (TTC) receiver for particle physics applications (together with the associated FPGA firmware).

A block diagram of the TTC FMC is shown below:

A 3-D diagram of the TTC FMC is shown below:

A picture of the TTC FMC is shown below:

Work so far

Date Event
01-03-2011 Project start.
30-04-2011 Schematics done.
27-05-2011 Layout completed.
24-06-2011 Four printed circuit boards manufactured.
17-08-2011 Two cards assembled.
01-09-2011 Successful clock and data recovery from optical source.

Files

  • ttcfmc.png
  • ttc_fmc.block.small.png
  • ttc_fmc.3d.small.png
Clone repository
  • Documents
  • Home
  • News
  • Documents
    • Fabrication files
    • Schematics
More Pages

New Wiki Page

Tip: You can specify the full path for the new file. We will automatically create any missing directories.