An FPGA Mezzanine Card (FMC) for clock & data recovery (CDR) from
optical sources has been developed at CERN. Its major components are a
commercial clock/recovery IC, an optical receiver with FC connector and
an SFP+ cage. The boards also offers two coaxial I/O connectors (LEMO
series 00). The FMC is often referred-to as TTC FMC since its main
purpose is to play the role of Timing Trigger and Control (TTC) receiver
for particle physics applications (together with the associated FPGA
A block diagram of the TTC FMC is shown
A 3-D diagram of the TTC FMC is shown
A picture of the TTC FMC is shown
Work so far
Four printed circuit boards manufactured.
Two cards assembled.
Successful clock and data recovery from optical source.