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Mock Turtle
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a9923fa0
Commit
a9923fa0
authored
Jan 09, 2023
by
Dimitris Lampridis
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hdl: make UART FIFO reset when CPU is reset
To avoid having any leftovers in the uart buffer after reset
parent
e36b053a
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mt_cpu_cb.vhd
hdl/rtl/cpu/mt_cpu_cb.vhd
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hdl/rtl/cpu/mt_cpu_cb.vhd
View file @
a9923fa0
...
@@ -428,7 +428,7 @@ begin -- arch
...
@@ -428,7 +428,7 @@ begin -- arch
p_uart_fifo_overflow
:
process
(
clk_sys_i
)
p_uart_fifo_overflow
:
process
(
clk_sys_i
)
begin
begin
if
rising_edge
(
clk_sys_i
)
then
if
rising_edge
(
clk_sys_i
)
then
if
rst_n_i
=
'0'
then
if
rst_n_i
=
'0'
or
cb_csr_i
.
cpu_o
.
reset_o
=
'1'
then
uart_fifo_reset_n
<=
'0'
;
uart_fifo_reset_n
<=
'0'
;
uart_drdy_o
<=
'0'
;
uart_drdy_o
<=
'0'
;
else
else
...
...
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