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MasterFIP - Gateware
Commit 5ee74546 authored by Evangelia Gousiou's avatar Evangelia Gousiou
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cleanup of xise projects

parent 8aa9f25a
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syn/spec/spec_masterfip.xise
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......@@ -737,10 +737,6 @@
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="83"/>
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="../../rtl/fmc_masterfip_eic.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/>
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
</file>
<file xil_pn:name="../../sim/spec/testbench/nanoFIP/wf_wb_controller.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="73"/>
<association xil_pn:name="Implementation" xil_pn:seqID="0"/>
......
syn/spec_mt/spec_masterfip_mt.xise 0 → 100644
View file @ 5ee74546
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