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MasterFIP - Gateware
Commit 5e1b6eda authored by kblantos's avatar kblantos
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Multiple RMQs are fine. HW tested. Needs reset feature

parent 70eae2d0
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rtl/mt_profip_translator.vhd
View file @ 5e1b6eda
......@@ -48,7 +48,7 @@ entity mt_profip_translator is
--! RX FIFO
g_input_fifo_depth : natural := 4;
--! TX FIFO
g_output_fifo_depth : natural := 128);
g_output_fifo_depth : natural := 4);
port (
--! Clock, reset and user interface
clk_i : in std_logic; --! MT clock
......@@ -555,7 +555,6 @@ begin
s_miso_fifo_data_in(5) <= (rmq_snk_i(0)(5).hdr & rmq_snk_i(0)(5).valid & rmq_snk_i(0)(5).last & rmq_snk_i(0)(5).error & rmq_snk_i(0)(5).data);
s_miso_fifo_data_in(6) <= (rmq_snk_i(1)(0).hdr & rmq_snk_i(1)(0).valid & rmq_snk_i(1)(0).last & rmq_snk_i(1)(0).error & rmq_snk_i(1)(0).data);
--! Selection of WRITE or READ to/from RMQ: this is the first 32-bits that ERTEC sends when the CS goes LOW
--! this is selected by wr_control(0). So we have:
--! wr_control(0) = '0' --> WRITE to RMQ
......@@ -810,6 +809,7 @@ begin
s_rd_state <= RD_HEADER;
s_spi_miso_data <= s_miso_data_reg;
elsif s_miso_fifo_rd_empty(s_rmq_id) = '1' and s_ready = '1' then
s_data_valid <= '1';
s_rd_state <= ERROR_STATE;
else
s_data_valid <= '0';
......@@ -883,9 +883,10 @@ begin
----------------------------------------------------------------
--! STATE ERROR_STATE
when ERROR_STATE =>
s_data_valid <= '1';
s_data_valid <= '1';
s_miso_last <= '0';
s_spi_miso_data <= x"DEADCAFE";
s_miso_data_reg <= x"DEADCAFE";
if s_spi_cs_n = '1' then
s_rd_state <= IDLE;
else
......@@ -898,6 +899,7 @@ begin
s_data_valid <= '0';
s_miso_last <= '0';
s_miso_data_reg <= (others => '0');
s_spi_miso_data <= (others => '0');
if s_spi_cs_n = '1' then
s_rd_state <= IDLE;
else
......@@ -946,6 +948,6 @@ begin
-- s_spi_miso_data <= s_miso_data_reg when s_data_valid = '1';
--! Convert RMQ_ID to an integer, to be used as an index
s_rmq_id <= to_integer(unsigned(s_wr_rmq_id));
s_rmq_id <= to_integer(unsigned(s_wr_rmq_id)) when s_spi_cs_n = '0' else 0;
end architecture rtl;
testbench/top_mt/main.sv
View file @ 5e1b6eda
......@@ -656,6 +656,101 @@ module main;
posedge_cnt <= posedge_cnt + 1;
end
logic [7:0] operation;
logic [7:0] rmq_id;
logic [7:0] data_len;
logic [31:0] basic_info;
logic [31:0] q_mosi_data[$];
logic [31:0] q_miso_data[$];
// Writing to RMQ the basic info part of the frame
task write_basic_info();
int i;
operation= 'h00;
rmq_id = $urandom_range(0,6); // to cover all RMQs
data_len = $urandom_range(1,16); //keep it small for now
// declare the mosi data to be sent
basic_info = {operation, rmq_id, data_len, 'h00}; //operation is 'h00 for writing
for (i=32;i>0;i--)
begin
@(posedge spi_clk);
spi_mosi = basic_info[i-1];
end
endtask // write_basic_info
// Reading part, this is the basic info part of the frame
task read_basic_info();
int i;
operation = 'h01;
basic_info = {operation, rmq_id, data_len, 'h00};
q_mosi_data.push_front(basic_info);
for (i=32;i>0;i--)
begin
@(posedge spi_clk);
spi_mosi = basic_info[i-1];
end
endtask // read_basic_info
// Generate the header and payload of the frame
task write_hdr_and_payload();
int i,j;
logic [31:0] mosi_data;
// Generates the header
for (j=0;j<3;j++)
begin
mosi_data = $urandom(); //generate data_len number of mosi_data
for (i=32;i>0;i--)
begin
@(posedge spi_clk);
spi_mosi = mosi_data[i-1];
end
q_mosi_data.push_back(mosi_data);
end
// Generates the payload
for (j=0;j<data_len;j++)
begin
mosi_data = $urandom();
for (i=32;i>0;i--)
begin
@(posedge spi_clk);
spi_mosi = mosi_data[i-1];
end
q_mosi_data.push_back(mosi_data);
end
endtask // write_hdr_and_payload
// Complete process of writing to RMQ
task write_to_rmq();
write_basic_info();
write_hdr_and_payload();
endtask //write_to_rmq;
// Complete process of reading from RMQ
task read_from_rmq();
int i,j;
// specify that we will read
read_basic_info();
// instead of setting mosi to zero or unknown
for (j=0;j<data_len;j++)
begin
mosi_data = $urandom();
for (i=32;i>0;i--)
begin
@(posedge spi_clk);
spi_mosi = mosi_data[i-1];
end
end
endtask // read_from_rmq
// Checks that MOSI data is as expected
always @(posedge clk_sys)
begin
......@@ -692,11 +787,9 @@ module main;
loadCPUFirmwares(fip);
$display("End of loading firmware");
// Queue initialization
q_mosi_data = {'h0,'h0,'h0,'h0,'h0};
// First is the MOSI (write to RMQ)
// for (int j=0;j<40;j++) begin
// spi_testing();
// end
spi_cs_n = 'b0;
sending_first_from_ertec();
......@@ -723,6 +816,11 @@ module main;
spi_cs_n = 'b1;
#1ms;
spi_cs_n = 'b0;
sending_sixth_from_ertec();
spi_cs_n = 'b1;
#1ms;
spi_cs_n = 'b0;
sending_sixth_from_ertec();
spi_cs_n = 'b1;
......
testbench/top_mt/wave.do
View file @ 5e1b6eda
......@@ -22,21 +22,11 @@ add wave -noupdate -expand -group DUT_RMQ -color Orange /main/DUT/rmq_snk_out
# MT_PROFIP_TRANSLATOR
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/clk_i
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/rst_n_i
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_spi_state
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_sample_en
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_shift_en
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_data_reg_o
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_data_reg_i
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_mosi_cnt
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_miso_cnt
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_operation
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_rmq_id
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_data_valid
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_ready
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_rd_en
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_state
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_mosi_data
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_rd_state
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_spi_miso_data
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_data_valid
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_control
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_rmq_id
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_data_len
......@@ -44,15 +34,19 @@ add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cm
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_header_cnt
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_header
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_wr_data
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_spi_data_valid_i
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_spi_data_valid_o
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_rd_state
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_spi_miso_data
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_miso_data_reg
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_operation
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_ready
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_data_valid
add wave -noupdate -expand -group MT_PROFIP_TRANSLATOR -color Green /main/DUT/cmp_mt_profip_translator/s_rd_en
# SPI SIGNALS
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/clk_i
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/rst_n_i
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_spi_state
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_sample_en
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_shift_en
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/spi_clk_i
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/spi_cs_n_i
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/spi_mosi_i
......@@ -61,8 +55,8 @@ add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_prof
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_shift_en
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_data_reg_o
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_data_reg_i
add wave -noupdate -expand -radix unsigned -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_mosi_cnt
add wave -noupdate -expand -radix unsigned -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_miso_cnt
add wave -noupdate -expand -group SPI_SIGNALS -radix unsigned -color Green /main/DUT/cmp_mt_profip_translator/s_mosi_cnt
add wave -noupdate -expand -group SPI_SIGNALS -radix unsigned -color Green /main/DUT/cmp_mt_profip_translator/s_miso_cnt
add wave -noupdate -expand -group SPI_SIGNALS -color Green /main/DUT/cmp_mt_profip_translator/s_rmq_id
# FIFOS
......
top/svec/svec_masterfip_mt_urv.vhd
View file @ 5e1b6eda
......@@ -255,7 +255,7 @@ entity svec_masterfip_mt_urv is
ertec_spi_clk_i : in std_logic; -- ERTEC SPI clock
ertec_spi_cs_n_i : in std_logic; -- ERTEC SPI chip select
ertec_rmq_status_o : out std_logic_vector(6 downto 0);
-- ertec_miso_ready_o : out std_logic; -- ERTEC detect if SPI MISO is ready
-- ertec_rst_fifo_i : out std_logic; -- ERTEC detect if SPI MISO is ready
-- ertec_mosi_busy_o : out std_logic; -- ERTEC detect if SPI MOSI line is busy
-- ertec_miso_busy_o : out std_logic;
......@@ -336,7 +336,7 @@ architecture rtl of svec_masterfip_mt_urv is
(app_id => c_MSTRFIP_APP_ID,
cpu_count => 2,
cpu_config => (0 => (memsize => 28672, --90760, -- in words(0x16288); the size should be enough for the storage of the RT sw running on CPU0 and for the macrocycle configuration
hmq_config => (1, (others => (2, 7, 2, x"0000_0000", true))), -- 4 entries, 128 wide, 2 header bits
hmq_config => (6, (others => (2, 7, 2, x"0000_0000", true))), -- 4 entries, 128 wide, 2 header bits
rmq_config => (6, (others => (2, 7, 3, x"0000_0000", true)))), --(c_DUMMY_MT_MQUEUE_SLOT)))),
1 => (memsize => 3072, --uint_8: 12288 --2084, --0x00824,
hmq_config => (1, (others => (2, 7, 2, x"0000_0000", true))),
......@@ -465,10 +465,12 @@ begin
cmp_mt_profip_translator : entity work.mt_profip_translator
generic map(
g_data_width => 32,
g_cpol => 0,
g_cpha => 1,
g_cdc_enable => 0)
g_data_width => 32,
g_cpol => 0,
g_cpha => 1,
g_cdc_enable => 0,
g_input_fifo_depth => 4,
g_output_fifo_depth => 4)
port map(
clk_i => clk_62m5_sys,
rst_n_i => local_reset_n,
......
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