| ... | ... | @@ -7,9 +7,10 @@ channels each with a fixed threshold discriminator and a slow shaper + |
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sample-and-hold + 12-bit ADC) to a FPGA. Read-out by Gigabit Ethernet
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(firmware supplied supports IPBus). Multiple boards can be plugged
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together to increase the channel count. Clocking circuitry compatible
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with the White Rabbit implementation of PTP.
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with the White Rabbit implementation of
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PTP.
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PICT0015.JPG
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[](Maroc\_topside\_l.jpg)
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*Single MAROC board, with 1000Base-T SFP
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inserted.**
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