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@@ -43,6 +43,14 @@ HydRA, acronym of Hydra-like Resilient Architecture, is a radiation-tolerant SoC
 
 |**Date**|**Event**|
 |----|----|
-|20-05-2020|Start of project|
-
-
+| Feb-2018 | Start of project, R2E research for rad-tol Ethernet Phy |
+| Aug-2018 | First CHARM irradiation of RISC-V |
+| Oct-2018 | CHARM irradiation of RISC-V with ECC-protected memory |
+| Nov-2018 | Hydra development status and tests result presentation at [29th RADWG meeting](https://indico.cern.ch/event/770775/) |
+| Mar-2019 | First version of shrunk-down OpenPowerlink running in Hydra with partial triplication |
+| May-2019 | Ethernet loopback radiation testing in PSI |
+| Jul-2019 | Hydra includes fully triplicated RISC-V (at 50MHz), logic for the recovery from misaligned CPUs, SECDED ECC |
+| Sep-2019 | OpenPowerlink stack runs on triplicated RISC-V |
+| Dec-2019 | Ethernet PHY selection concluded on KSZ8081 |
+| Jul-2020 | PSI radiation test of Hydra - only 2 uncorrectable memory errors up to 500Gy |
+| Dec-2020 | Hydra performance presented to R2E. TID: 500Gy, cross-section: ~3e-12 |