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Commit caf0dc27 authored by Tristan Gingold's avatar Tristan Gingold
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rtl: fix some warnings

parent defc6aef
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...@@ -179,6 +179,7 @@ begin ...@@ -179,6 +179,7 @@ begin
reg_dm_data_s <= (others => '0'); reg_dm_data_s <= (others => '0');
reg_dm_data_select <= (others => '1'); reg_dm_data_select <= (others => '1');
elsif cpu_rst_n_i = '0' then elsif cpu_rst_n_i = '0' then
-- Clear dram.
if dm_done = '1' then if dm_done = '1' then
reg_dm_addr <= std_logic_vector(unsigned(reg_dm_addr) + 4); reg_dm_addr <= std_logic_vector(unsigned(reg_dm_addr) + 4);
end if; end if;
...@@ -221,6 +222,7 @@ begin ...@@ -221,6 +222,7 @@ begin
we_i => iram_we, we_i => iram_we,
wdata_i => iram_data, wdata_i => iram_data,
wforce_i => (others => '0'), wforce_i => (others => '0'),
wdone_o => open,
ecc_one_o => iram_ecc_err, ecc_one_o => iram_ecc_err,
ecc_fatal_o => iram_ecc_fatal, ecc_fatal_o => iram_ecc_fatal,
...@@ -290,6 +292,7 @@ begin ...@@ -290,6 +292,7 @@ begin
reg_dm_load <= '0'; reg_dm_load <= '0';
reg_dm_store <= '0'; reg_dm_store <= '0';
elsif cpu_rst_n_i = '0' then elsif cpu_rst_n_i = '0' then
-- Write to dram until the last address.
reg_dm_store <= not reg_dm_addr(g_DRAM_LOG_SIZE); reg_dm_store <= not reg_dm_addr(g_DRAM_LOG_SIZE);
else else
if dm_cycle_in_progress = '0' then if dm_cycle_in_progress = '0' then
...@@ -468,6 +471,7 @@ begin ...@@ -468,6 +471,7 @@ begin
reset_cause_ecc_i => reset_cause_ecc, reset_cause_ecc_i => reset_cause_ecc,
reset_cause_watchdog_i => reset_cause_wd, reset_cause_watchdog_i => reset_cause_wd,
cpu_reset_i => cpu_rst, cpu_reset_i => cpu_rst,
cpu_reset_o => open,
cpu_recovery_i => cpu_recovery, cpu_recovery_i => cpu_recovery,
cpu_recovery_o => cpu_recovery_in, cpu_recovery_o => cpu_recovery_in,
cpu_wr_o => cpu_wr, cpu_wr_o => cpu_wr,
......
...@@ -154,8 +154,8 @@ begin ...@@ -154,8 +154,8 @@ begin
p_ctrl: process (state, p_ctrl: process (state,
p_done, r_done, scrub_done, rerr, p_done, r_done, scrub_done, rerr,
rerr_one, rdata_ecc, rsyndrome, last_addr, last_we, last_sel, recc, rerr_one, rdata_ecc, rsyndrome, last_addr, last_we, last_sel, recc,
en_i, addr_i, we_i, data_i, r_done_d, en_i, addr_i, we_i, data_i, sel_i, r_done_d,
scrub_rd, scrub_addr, scrub_done_d, rst_n_i) scrub_rd, scrub_addr, scrub_done_d, cpu_rst_n_i)
is is
variable d : std_logic_vector(31 downto 0); variable d : std_logic_vector(31 downto 0);
begin begin
......
...@@ -168,7 +168,7 @@ begin ...@@ -168,7 +168,7 @@ begin
p_ctrl: process (state, r1_done, r2_done, rerr, rerr_one, rdata_ecc, rsyndrome, last_raddr, recc, p_ctrl: process (state, r1_done, r2_done, rerr, rerr_one, rdata_ecc, rsyndrome, last_raddr, recc,
r1_en_i, r1_addr_i, we_i, waddr_i, wdata_i, wforce_i, r1_done_d, r2_done_d, r1_en_i, r1_addr_i, we_i, waddr_i, wdata_i, wforce_i, r1_done_d, r2_done_d,
r2_en_i, r2_addr_i, scrub_rd, scrub_addr, scrub_done, scrub_done_d, rst_n_i) r2_en_i, r2_addr_i, scrub_rd, scrub_addr, scrub_done, scrub_done_d, cpu_rst_n_i)
begin begin
wen <= '0'; wen <= '0';
waddr <= (others => 'X'); waddr <= (others => 'X');
......
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