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Created with Raphaël 2.2.06Aug5432131Jul29282726252423222019161529Jun2897642131May302422201918171615530Apr2926191430Mar252423201713Oct24Jun25May27Apr2428Mar27169Feb872Jan3Dec18Nov1514137510Oct963216Sep28Apr2610938Feb24Jan14Nov24Oct232221224Sep2327Aug1692131Jul201612115430Jun28272624232019181713121164224May21548Mar22Feb2123Jan31Oct30Jul274Jun26Apr1827Mar65329Feb23131024Jan23221825Oct626Aug239432126Jul151413121187429Jun22212017Code refactored with autopep8Massive code style refactoring and (yet) unused code purgeSome code style change and minor issues solvedRemove some unused imports at the base makefile writerFix some bugs in the not yet tested synthesis toolsSupress unneded inheritance: Tool and Action were mixedMassive hierarchy refactoring on tool info constantsRefactor makefile writing functions into syn/sim specific ClassesRefactor Altera Quartus synthesis Makefile generationRefactor Microsemi Libero synthesis Makefile generationApply ugly hack to Diamond TCL interpreter bin nameRefactor Lattice Diamond synthesis Makefile generationClean up the new ISE makefile generator codeSwitch from XML to TCL for generating the ISE projectCreate a new Class to contain common Xilinx stuffRename the Makefile printing methodsRemove unused properties at Vivado and PlanAhead ClassesRemove unused simulation property from Vivado and PlanAheadRefactor Vivado as we did with PlanAheadRefactoring synthesis process: concept test on PlanAheadGenerate a smarter synthesis MakefileSnapshot: refactoring synthesis Makefile generationApply autopep8 --aggressive on recently modified simulation filesMassive refactoring assisted by autopep8Improve coding style for all the toolsAdd the -g2012 option to the VHDL demo for IVerilogThe method supported_files from tools is not longer requiredSome coding style issues solved on ISE synthesisPurge get_standard_libraries method: it is not totally correct and is never usedRefactor how the tool_info is stored in their ClassesRefactor Aldec-HDL makefile generationRefactor Modelsim for a more compact codeRefactor Riviera simulation: we cannot test it (missing license)Refactor GHDL makefile writerSome refactoring in the simulation Makefile generationFix some issues with quartus and improve Riviera interfaceDisable remote synthesis functionality: web interface as replacementFix some typos and format issues in actionRelocate makefile writer capabilities in the Class hierarchyRun Autopep8 aggressive for tools files