Skip to content

G
Gennum GN4124 core
Commit c5520d7a authored by Tristan Gingold's avatar Tristan Gingold
Browse files
Options

gn412x_bfm: remove unused signals/variables.

parent 28a645b1
Hide whitespace changes
Inline Side-by-side
Showing with 0 additions and 15 deletions
hdl/sim/gn4124_bfm/gn412x_bfm.vhd
View file @ c5520d7a
...@@ -181,7 +181,6 @@ architecture MODEL of GN412X_BFM is ...@@ -181,7 +181,6 @@ architecture MODEL of GN412X_BFM is
--=========================================================================-- --=========================================================================--
procedure sget_boolean(S : in string; P : inout integer; X : out boolean) is procedure sget_boolean(S : in string; P : inout integer; X : out boolean) is
variable char : character; variable char : character;
variable q : integer;
begin begin
if(S'length > P) then if(S'length > P) then
char := S(P); char := S(P);
...@@ -366,11 +365,6 @@ architecture MODEL of GN412X_BFM is ...@@ -366,11 +365,6 @@ architecture MODEL of GN412X_BFM is
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- Top Level I/O signals SECONDARY MODE -- Top Level I/O signals SECONDARY MODE
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-------------------------------------------------------------
----------------- Local Bus Clock ---------------------------
-------------------------------------------------------------
--
signal LCLKi, LCLKni : std_ulogic;
------------------------------------------------------------- -------------------------------------------------------------
----------------- Local-to-PCI Dataflow --------------------- ----------------- Local-to-PCI Dataflow ---------------------
------------------------------------------------------------- -------------------------------------------------------------
...@@ -416,7 +410,6 @@ architecture MODEL of GN412X_BFM is ...@@ -416,7 +410,6 @@ architecture MODEL of GN412X_BFM is
-- Used by the Inbound State Machine -- Used by the Inbound State Machine
-- --
signal ICLK : std_ulogic; -- Internal Inbound clock signal ICLK : std_ulogic; -- Internal Inbound clock
signal LCLK_PERIOD : time := T_LCLK;
----------------------------------------------------------------------------- -----------------------------------------------------------------------------
-- Internal Model Signals -- Internal Model Signals
...@@ -921,9 +914,7 @@ CMD <= f_cmd_to_string(CMD_INT); ...@@ -921,9 +914,7 @@ CMD <= f_cmd_to_string(CMD_INT);
variable OUTPUT_LINE : line; variable OUTPUT_LINE : line;
variable ERR_CNT : integer; variable ERR_CNT : integer;
variable L_CMD : string(1 to 80); variable L_CMD : string(1 to 80);
variable TMP_STR : string(1 to 80);
variable QCMD : string(CMD'range); variable QCMD : string(CMD'range);
variable L_NUM : integer;
variable L_ADDR : std_ulogic_vector(63 downto 0); variable L_ADDR : std_ulogic_vector(63 downto 0);
variable L_BE : std_ulogic_vector(3 downto 0); variable L_BE : std_ulogic_vector(3 downto 0);
variable L_DATA : std_ulogic_vector(31 downto 0); variable L_DATA : std_ulogic_vector(31 downto 0);
...@@ -945,7 +936,6 @@ CMD <= f_cmd_to_string(CMD_INT); ...@@ -945,7 +936,6 @@ CMD <= f_cmd_to_string(CMD_INT);
variable CURRENT_VC : integer; variable CURRENT_VC : integer;
variable IWAIT_RANDOM : integer; variable IWAIT_RANDOM : integer;
variable IWAIT_RANDOM_N : integer; variable IWAIT_RANDOM_N : integer;
variable RNDNUM : integer;
variable BAR_HIT : boolean_vector(1 downto 0); variable BAR_HIT : boolean_vector(1 downto 0);
variable BFM_BAR_HIT : boolean_vector(1 downto 0); variable BFM_BAR_HIT : boolean_vector(1 downto 0);
variable DATA_TMP8 : std_ulogic_vector(7 downto 0); variable DATA_TMP8 : std_ulogic_vector(7 downto 0);
...@@ -972,11 +962,6 @@ CMD <= f_cmd_to_string(CMD_INT); ...@@ -972,11 +962,6 @@ CMD <= f_cmd_to_string(CMD_INT);
variable RD_TYPE : std_ulogic_vector(3 downto 0); variable RD_TYPE : std_ulogic_vector(3 downto 0);
variable RW_BLAST : boolean; variable RW_BLAST : boolean;
--
-- OUT variables
variable OUT_NOSNOOP : std_ulogic;
-- variable OUT_VC : std_ulogic;
variable OUT_TC : std_ulogic_vector(2 downto 0);
-- --
-- Read Completion Management -- Read Completion Management
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment