Generic Cores Library (a.k.a. GenCores)
GenCores library provides a number of common VHDL components used in various projects hosted in the OHR. The library comprises 3 packages:
-
gencores_pkg
- simple cores (synchronizer chain, delay generator, pulse extender, PI controller, CRC generator, etc.) -
genram_pkg
- collection of platform-independent wrappers for RAMs and FIFOs provided by the FPGA vendors (currently supported: Altera Cyclone3, Arria 2 GX and Xilinx Spartan6/Virtex6) -
wishbone_pkg
- set of commonly used Wishbone modules (UART, SPI, I2C, Onewire, GPIO, Timer, Interrupt controller, LM32 CPU, Pipelined WB Interconnect)
Available cores
General purpose
-
gc_arbitrated_mux
- round-robin arbitrated N to 1 data stream multiplexer -
gc_bicolor_led_ctrl
- small bicolor LED matrix controller -
gc_big_addrer
- Kogge-Stone parametrizable adder -
gc_crc_gen
- parametrizable CRC generator/checker -
gc_delay_gen
- parametrizable signal synchronous delay line -
gc_dual_pi_controller
- simple PI controller -
gc_dyn_glitch_filt
- dynamic glitch filter -
gc_extend_pulse
- pulse width extender -
gc_frequency_meter
- as the name says -
gc_fsm_watchdog
- watchdog unit for state machines -
gc_glitch_filt
- asynchronous input deglitcher -
gc_i2c_slave
- parametrizable I2C slave core -
gc_moving_average
- parametrizable moving average filter -
gc_prio_encoder
- priority encoder, one-hot output -
gc_pulse_synchronizer
- cross-clock domain pulse synchronizer, works with any pulse width -
gc_reset
- power on reset unit -
gc_rr_arbiter
- Round-Robin arbiter -
gc_serial_dac
- simple interface for DACs with SPI interface -
gc_sync_ffs
- 3-stage synchronizer flip flop chain -
gc_sync_register
- 3-stage synchronizer flip flop chain (multi-bit version) -
gc_word_packer
- packs data stream of one bit width into a stream of another bit width