This avoids sleeping in interrupt handlers.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Adding ZEROBASED allows the lm32 to enumerate fpga cores without
prviding a specific read() method.

Removing "verbose" as an argument to sdbfs_dev_create (and allowing
the user to set it in fs->flags) is a minor cleanup, though incompatible.
Userspace is fixed to deal with this incompatibility.

This is a slight incompatibility, but it's worh doing.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

s

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

ed

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

This finally allows me to look at the content of an FPGA:

  wrs# sdb-read -l -e 0x70000 -m 0x100000@0x10000000 /dev/mem
  /tmp2/sdb-read: listing format is to be defined
  0000000000000651:e6a542c9 @ 00000000-0007ffff WB4-Crossbar-GSI
  0000000000000651:eef0b198 @ 00000000-0001ffff WB4-Bridge-GSI
  0000000000000651:e6a542c9 @ 00000000-0001ffff   WB4-Crossbar-GSI
  000000000000ce42:66cfeb52 @ 00000000-0000ffff   WB4-BlockRAM
  000000000000ce42:e2d13d04 @ 00010000-000100ff   WR-Periph-UART
  000000000000ce42:65158dc0 @ 00010100-000101ff   WR-Soft-PLL
  000000000000ce42:e503947e @ 00010200-0001021f   WB-SPI.Control
  000000000000ce42:441c5143 @ 00010300-000103ff   WB-GPIO-Port
  000000000000ce42:57494266 @ 00010400-000104ff   WB Simple Timer
  000000000000ce42:de0d8ced @ 00010500-000105ff   WR-PPS-Generator
  000000000000ce42:ba07b9d3 @ 00020000-0002ffff WRSW NIC
  0000000000000651:eef0b198 @ 00030000-00037fff WB4-Bridge-GSI
  0000000000000651:e6a542c9 @ 00030000-00037fff   WB4-Crossbar-GSI
  000000000000ce42:650c2d4f @ 00030000-000300ff   WR-Endpoint
  000000000000ce42:650c2d4f @ 00030400-000304ff   WR-Endpoint
  000000000000ce42:650c2d4f @ 00030800-000308ff   WR-Endpoint
  000000000000ce42:650c2d4f @ 00030c00-00030cff   WR-Endpoint
  [...]
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Usually our cards are used in MSI mode. On older motherboards, they
can fall back to classic interrupt generation. However, then the
interrupt enable register in the card must be turned on.

Previously, the interrupt handler popped the data from the hardware.
To do this, it needed to lock the target buffers, guarded by a mutex.
Unfortunately, that can cause the interrupt handler to sleep! bad!

This patch moves the waitq and fasync structure to the wishbone structure
which is always present.  Then, the interrupt handler need only wake up any
threads blocked waiting for data.  The read/poll functions invoke the
processing of data from the hardware, instead.

The drivers were popping the slave request FIFO, whether it was empty or not.
This seemed safe since empty FIFOs do nothing when popped. However, if the
FIFO receives an element between the empty check and the pop, we might pop
an element without ever seeing it. Under load this led to lost interrupts.